2c9a538582
bump libmc1322x to 7bee48243c
Conflicts:
cpu/mc1322x/board/Makefile.board
cpu/mc1322x/lib/include/uart.h
cpu/mc1322x/lib/uart1.c
cpu/mc1322x/lib/uart2.c
cpu/mc1322x/src/default_lowlevel.c
240 lines
8.3 KiB
C
240 lines
8.3 KiB
C
/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef GPIO_H
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#define GPIO_H
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/* Structure-based GPIO access
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Example usage:
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GPIO->FUNC_SEL0 |= 0x00008000; // set a whole register
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GPIO->FUNC_SEL_08 = 2; // set just one pin
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#define MY_PIN GPIO_08
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GPIO->FUNC_SEL.MY_PIN = 2; // same, to allow #define for pin names
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GPIO->DATA.MY_PIN = 1;
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gpio_set(GPIO_08); // efficiently set or clear a single output bit
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gpio_reset(GPIO_08);
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*/
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// GPIO to Function Alias macros:
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#define ADC0 GPIO_30
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#define ADC1 GPIO_31
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#define ADC2 GPIO_32
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#define ADC3 GPIO_33
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#define ADC4 GPIO_34
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#define ADC5 GPIO_35
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#define ADC6 GPIO_36
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#define ADC7 GPIO_37
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#define TDO GPIO_49
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#define TDI GPIO_48
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#define TCK GPIO_47
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#define TMS GPIO_46
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#define U2RTS GPIO_21
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#define U2CTS GPIO_20
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#define U2RX GPIO_19
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#define U2TX GPIO_18
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#define U1RTS GPIO_17
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#define U1CTS GPIO_16
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#define U1RX GPIO_15
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#define U1TX GPIO_14
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#define SDA GPIO_13
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#define SCL GPIO_12
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#define TMR3 GPIO_11
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#define TMR2 GPIO_10
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#define TMR1 GPIO_09
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#define TMR0 GPIO_08
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#define SCK GPIO_07
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#define MOSI GPIO_06
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#define MISO GPIO_05
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#define SS GPIO_04
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#define BTCK GPIO_03
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#define FSYN GPIO_02
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#define SSIRX GPIO_01
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#define SSITX GPIO_00
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#define KBI7 GPIO_29
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#define KBI6 GPIO_28
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#define KBI5 GPIO_27
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#define KBI4 GPIO_26
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#define KBI3 GPIO_25
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#define KBI2 GPIO_24
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#define KBI1 GPIO_23
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#define KBI0 GPIO_22
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#define TXON GPIO_44
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#define RXON GPIO_45
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#define ANT1 GPIO_42
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#define ANT2 GPIO_43
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#define VREF2H GPIO_38
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#define VREF2L GPIO_39
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#define VREF1H GPIO_40
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#define VREF1L GPIO_41
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#define MDO0 GPIO_51
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#define MDO1 GPIO_52
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#define MDO2 GPIO_53
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#define MDO3 GPIO_54
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#define MDO4 GPIO_55
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#define MDO5 GPIO_56
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#define MDO6 GPIO_57
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#define MDO7 GPIO_58
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#define MSEO0 GPIO_59
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#define MSEO1 GPIO_60
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#define RDY GPIO_61
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#define EVTO GPIO_62
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#define MCKO GPIO_50
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#define EVTI GPIO_63
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#define _V(x,n,i) uint32_t x##_##i : n;
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#define _REP(x,n) \
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_V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \
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_V(x,n,08) _V(x,n,09) _V(x,n,10) _V(x,n,11) _V(x,n,12) _V(x,n,13) _V(x,n,14) _V(x,n,15) \
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_V(x,n,16) _V(x,n,17) _V(x,n,18) _V(x,n,19) _V(x,n,20) _V(x,n,21) _V(x,n,22) _V(x,n,23) \
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_V(x,n,24) _V(x,n,25) _V(x,n,26) _V(x,n,27) _V(x,n,28) _V(x,n,29) _V(x,n,30) _V(x,n,31) \
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_V(x,n,32) _V(x,n,33) _V(x,n,34) _V(x,n,35) _V(x,n,36) _V(x,n,37) _V(x,n,38) _V(x,n,39) \
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_V(x,n,40) _V(x,n,41) _V(x,n,42) _V(x,n,43) _V(x,n,44) _V(x,n,45) _V(x,n,46) _V(x,n,47) \
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_V(x,n,48) _V(x,n,49) _V(x,n,50) _V(x,n,51) _V(x,n,52) _V(x,n,53) _V(x,n,54) _V(x,n,55) \
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_V(x,n,56) _V(x,n,57) _V(x,n,58) _V(x,n,59) _V(x,n,60) _V(x,n,61) _V(x,n,62) _V(x,n,63)
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struct GPIO_struct {
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#define _IO(x) \
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union { struct { uint32_t x##0; uint32_t x##1; }; \
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struct { _REP(x, 1) }; \
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struct GPIO_##x { _REP(GPIO, 1) } x; };
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#define _IO_2bit(x) \
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union { struct { uint32_t x##0; uint32_t x##1; uint32_t x##2; uint32_t x##3; }; \
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struct { _REP(x, 2) }; \
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struct GPIO_##x { _REP(GPIO, 2) } x; };
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_IO(PAD_DIR);
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_IO(DATA);
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_IO(PAD_PU_EN);
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_IO_2bit(FUNC_SEL);
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_IO(DATA_SEL);
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_IO(PAD_PU_SEL);
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_IO(PAD_HYST_EN);
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_IO(PAD_KEEP);
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_IO(DATA_SET);
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_IO(DATA_RESET);
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_IO(PAD_DIR_SET);
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_IO(PAD_DIR_RESET);
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};
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#undef _IO
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#undef _IO_2bit
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/* Build an enum lookup to map GPIO_08 -> 8 */
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#undef _V
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#define _V(x,n,i) __NUM_GPIO_GPIO_##i,
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enum { _REP(0,0) };
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/* Macros to set or reset a data pin in the fastest possible way */
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#define gpio_set(gpio_xx) __gpio_set(gpio_xx)
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#define __gpio_set(gpio_xx) \
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((__NUM_GPIO_##gpio_xx < 32) \
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? (GPIO->DATA_SET0 = (1 << (__NUM_GPIO_##gpio_xx - 0))) \
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: (GPIO->DATA_SET1 = (1 << (__NUM_GPIO_##gpio_xx - 32))))
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#define gpio_reset(gpio_xx) __gpio_reset(gpio_xx)
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#define __gpio_reset(gpio_xx) \
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((__NUM_GPIO_##gpio_xx < 32) \
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? (GPIO->DATA_RESET0 = (1 << (__NUM_GPIO_##gpio_xx - 0))) \
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: (GPIO->DATA_RESET1 = (1 << (__NUM_GPIO_##gpio_xx - 32))))
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#undef _REP
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#undef _V
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static volatile struct GPIO_struct * const GPIO = (void *) (0x80000000);
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/* Old register definitions, for compatibility */
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#ifndef REG_NO_COMPAT
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#define GPIO_PAD_DIR0 ((volatile uint32_t *) 0x80000000)
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#define GPIO_PAD_DIR1 ((volatile uint32_t *) 0x80000004)
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#define GPIO_DATA0 ((volatile uint32_t *) 0x80000008)
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#define GPIO_DATA1 ((volatile uint32_t *) 0x8000000c)
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#define GPIO_PAD_PU_EN0 ((volatile uint32_t *) 0x80000010)
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#define GPIO_PAD_PU_EN1 ((volatile uint32_t *) 0x80000014)
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#define GPIO_FUNC_SEL0 ((volatile uint32_t *) 0x80000018) /* GPIO 15 - 0; 2 bit blocks */
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#define GPIO_FUNC_SEL1 ((volatile uint32_t *) 0x8000001c) /* GPIO 16 - 31; 2 bit blocks */
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#define GPIO_FUNC_SEL2 ((volatile uint32_t *) 0x80000020) /* GPIO 32 - 47; 2 bit blocks */
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#define GPIO_FUNC_SEL3 ((volatile uint32_t *) 0x80000024) /* GPIO 48 - 63; 2 bit blocks */
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#define GPIO_DATA_SEL0 ((volatile uint32_t *) 0x80000028)
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#define GPIO_DATA_SEL1 ((volatile uint32_t *) 0x8000002c)
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#define GPIO_PAD_PU_SEL0 ((volatile uint32_t *) 0x80000030)
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#define GPIO_PAD_PU_SEL1 ((volatile uint32_t *) 0x80000034)
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#define GPIO_DATA_SET0 ((volatile uint32_t *) 0x80000048)
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#define GPIO_DATA_SET1 ((volatile uint32_t *) 0x8000004c)
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#define GPIO_DATA_RESET0 ((volatile uint32_t *) 0x80000050)
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#define GPIO_DATA_RESET1 ((volatile uint32_t *) 0x80000054)
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#define GPIO_PAD_DIR_SET0 ((volatile uint32_t *) 0x80000058)
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#define GPIO_PAD_DIR_SET1 ((volatile uint32_t *) 0x8000005c)
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#define GPIO_PAD_DIR_RESET0 ((volatile uint32_t *) 0x80000060)
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#define GPIO_PAD_DIR_RESET1 ((volatile uint32_t *) 0x80000064)
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inline void gpio_pad_dir(volatile uint64_t data);
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inline void gpio_data(volatile uint64_t data);
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inline uint64_t gpio_data_get(volatile uint64_t bits);
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inline void gpio_pad_pu_en(volatile uint64_t data);
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inline void gpio_data_sel(volatile uint64_t data);
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inline void gpio_data_pu_sel(volatile uint64_t data);
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inline void gpio_data_set(volatile uint64_t data);
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inline void gpio_data_reset(volatile uint64_t data);
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inline void gpio_pad_dir_set(volatile uint64_t data);
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inline void gpio_pad_dir_reset(volatile uint64_t data);
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/* select pullup or pulldown for GPIO 0-31 (b=0-31) */
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#define gpio_sel0_pullup(b) (set_bit(*GPIO_PAD_PU_SEL0,b))
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#define gpio_sel0_pulldown(b) (clear_bit(*GPIO_PAD_PU_SEL0,b))
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/* select pullup or pulldown for GPIO 32-63 (b=32-63) */
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#define gpio_sel1_pullup(b) (set_bit(*GPIO_PAD_PU_SEL1,b-32))
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#define gpio_sel1_pulldown(b) (clear_bit(*GPIO_PAD_PU_SEL1,b-32))
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/* enable/disable pullup for GPIO 0-31 (b=0-31) */
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#define gpio_pu0_enable(b) (set_bit(*GPIO_PAD_PU_EN0,b))
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#define gpio_pu0_disable(b) (clear_bit(*GPIO_PAD_PU_EN0,b))
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/* enable/disable pullup for GPIO 32-63 (b=32-63) */
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#define gpio_pu1_enable(b) (set_bit(*GPIO_PAD_PU_EN1,b-32))
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#define gpio_pu1_disable(b) (clear_bit(*GPIO_PAD_PU_EN1,b-32))
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#endif /* REG_NO_COMPAT */
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#endif
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