126 lines
4.2 KiB
C
126 lines
4.2 KiB
C
/*
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* Copyright (C) 2015-2016, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef CPU_X86_DRIVERS_QUARKX1000_IMR_H_
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#define CPU_X86_DRIVERS_QUARKX1000_IMR_H_
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#include <stdint.h>
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typedef union quarkX1000_imr_lo {
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struct {
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uint32_t : 2;
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uint32_t addr : 22;
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uint32_t : 7;
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uint32_t lock : 1;
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};
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uint32_t raw;
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} quarkX1000_imr_lo_t;
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typedef union quarkX1000_imr_hi {
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struct {
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uint32_t : 2;
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uint32_t addr : 22;
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uint32_t : 8;
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};
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uint32_t raw;
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} quarkX1000_imr_hi_t;
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/* Amount to shift imr_lo/hi.addr left to obtain the bound address */
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#define QUARKX1000_IMR_SHAMT 10
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typedef union quarkX1000_imr_rdmsk {
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struct {
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uint32_t cpu0 : 1;
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uint32_t cpu_0 : 1;
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uint32_t : 6;
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uint32_t vc0_sai_id0 : 1;
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uint32_t vc0_sai_id1 : 1;
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uint32_t vc0_sai_id2 : 1;
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uint32_t vc0_sai_id3 : 1;
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uint32_t vc1_sai_id0 : 1;
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uint32_t vc1_sai_id1 : 1;
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uint32_t vc1_sai_id2 : 1;
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uint32_t vc1_sai_id3 : 1;
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uint32_t : 13;
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uint32_t punit : 1;
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uint32_t : 1;
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uint32_t esram_flush_init : 1;
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};
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uint32_t raw;
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} quarkX1000_imr_rdmsk_t;
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typedef union quarkX1000_imr_wrmsk {
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struct {
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uint32_t cpu0 : 1;
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uint32_t cpu_0 : 1;
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uint32_t : 6;
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uint32_t vc0_sai_id0 : 1;
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uint32_t vc0_sai_id1 : 1;
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uint32_t vc0_sai_id2 : 1;
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uint32_t vc0_sai_id3 : 1;
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uint32_t vc1_sai_id0 : 1;
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uint32_t vc1_sai_id1 : 1;
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uint32_t vc1_sai_id2 : 1;
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uint32_t vc1_sai_id3 : 1;
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uint32_t : 13;
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uint32_t punit : 1;
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uint32_t cpu_snoop : 1;
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uint32_t esram_flush_init : 1;
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};
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uint32_t raw;
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} quarkX1000_imr_wrmsk_t;
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/* Refer to Intel Quark SoC X1000 Datasheet, Section 12.7.4 for more details on
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* the IMR registers.
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*/
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typedef struct quarkX1000_imr {
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quarkX1000_imr_lo_t lo;
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quarkX1000_imr_hi_t hi;
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quarkX1000_imr_rdmsk_t rdmsk;
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quarkX1000_imr_wrmsk_t wrmsk;
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} quarkX1000_imr_t;
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/* The Intel Quark SoC X1000 defines eight general IMRs. */
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#define QUARKX1000_IMR_CNT 8
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/* Routines for accessing the Isolated Memory Region (IMR) feature.
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*
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* The Intel Quark X1000 SoC includes support for Isolated Memory Regions
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* (IMRs), which are specified using range registers and associated
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* control registers that are accessible via the message bus.
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*
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* Refer to Intel Quark SoC X1000 Datasheet, Section 12.2 for more information.
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*/
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quarkX1000_imr_t quarkX1000_imr_read(uint32_t imr_idx);
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void quarkX1000_imr_write(uint32_t imr_idx, quarkX1000_imr_t imr);
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#endif /* CPU_X86_DRIVERS_QUARKX1000_IMR_H_ */
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