nes-proj/arch/cpu/simplelink/rf-settings/rf-prop-settings.c

280 lines
8.5 KiB
C
Raw Blame History

//*********************************************************************************
// Generated by SmartRF Studio version 2.8.0 ( build #41)
// Compatible with SimpleLink SDK version: CC13x2 SDK 1.60.xx.xx
// Device: CC1352 Rev. 1.0
//
//*********************************************************************************
//*********************************************************************************
// Parameter summary
// Address: off
// Address0: 0xAA
// Address1: 0xBB
// Frequency: 868.00000 MHz
// Data Format: Serial mode disable
// Deviation: 25.000 kHz
// pktLen: 30
// 802.15.4g Mode: off
// Select bit order to transmit PSDU octets:: 1
// Packet Length Config: Variable
// Max Packet Length: 255
// Packet Length: 30
// RX Filter BW: 98.0 kHz
// Symbol Rate: 50.00000 kBaud
// Sync Word Length: 32 Bits
// TX Power: 14 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
// Whitening: No whitening
#include <ti/devices/DeviceFamily.h>
#include DeviceFamily_constructPath(driverlib/rf_mailbox.h)
#include DeviceFamily_constructPath(driverlib/rf_common_cmd.h)
#include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h)
#include <ti/drivers/rf/RF.h>
#include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_prop.h)
#include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genfsk.h)
#include DeviceFamily_constructPath(rf_patches/rf_patch_mce_genfsk.h)
#include <contiki.h>
#include <dev/radio.h>
#include "rf-core.h"
/*---------------------------------------------------------------------------*/
/**
* \addtogroup rf-core-prop
* @{
*
* \file
* Default TX power settings. The board can override
*/
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/* Default TX power settings for the 779-930MHz band */
RF_TxPower RF_propTxPower779_930[] = {
{ 14, 0xa73f },
{ 13, 0xa63f }, /* 12.5 */
{ 12, 0xb818 },
{ 11, 0x50da },
{ 10, 0x38d3 },
{ 9, 0x2ccd },
{ 8, 0x24cb },
{ 7, 0x20c9 },
{ 6, 0x1cc7 },
{ 5, 0x18c6 },
{ 4, 0x18c5 },
{ 3, 0x14c4 },
{ 2, 0x1042 },
{ 1, 0x10c3 },
{ 0, 0x0041 },
{ -10, 0x08c0 },
{-128, 0xFFFF },
};
/*---------------------------------------------------------------------------*/
/* Default TX power settings for the 431-527MHz band */
RF_TxPower RF_propTxPower431_527[] = {
{ 15, 0x003f },
{ 14, 0xbe3f }, /* 13.7 */
{ 13, 0x6a0f },
{ 10, 0x3dcb },
{ 6, 0x22c4 },
{-128, 0xFFFF },
};
/*---------------------------------------------------------------------------*/
/**
* @}
*/
// TI-RTOS RF Mode Object
RF_Mode RF_propMode =
{
.rfMode = RF_MODE_AUTO,
.cpePatchFxn = &rf_patch_cpe_prop,
.mcePatchFxn = &rf_patch_mce_genfsk,
.rfePatchFxn = &rf_patch_rfe_genfsk,
};
// Overrides for CMD_PROP_RADIO_DIV_SETUP
static uint32_t pOverrides[] =
{
// override_use_patch_prop_genfsk.xml
// PHY: Use MCE RAM patch, RFE RAM patch
MCE_RFE_OVERRIDE(1,0,0,1,0,0),
// override_synth_prop_863_930_div5.xml
// Synth: Use 48 MHz crystal as synth clock, enable extra PLL filtering
(uint32_t)0x02400403,
// Synth: Set minimum RTRIM to 7
(uint32_t)0x00078793,
// Synth: Configure extra PLL filtering
(uint32_t)0x00108463,
// Synth: Set Fref to 4 MHz
(uint32_t)0x000684A3,
// Synth: Set loop bandwidth after lock to 20 kHz
(uint32_t)0x0A480583,
// Synth: Set loop bandwidth after lock to 20 kHz
(uint32_t)0x7AB80603,
// override_phy_tx_pa_ramp_genfsk.xml
// Tx: Configure PA ramping, set wait time before turning off (0x2F ticks <20> 16/24 us = 31.3 us).
HW_REG_OVERRIDE(0x6028,0x002F),
// Tx: Configure PA ramp time, PACTL2.RC=0x3 (in ADI0, set PACTL2[3]=1)
ADI_HALFREG_OVERRIDE(0,16,0x8,0x8),
// Tx: Configure PA ramp time, PACTL2.RC=0x3 (in ADI0, set PACTL2[4]=1)
ADI_HALFREG_OVERRIDE(0,17,0x1,0x1),
// override_phy_rx_aaf_bw_0xd.xml
// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
// override_phy_rx_rssi_offset_neg2db.xml
// Rx: Set RSSI offset to adjust reported RSSI by -2 dB
(uint32_t)0x000288A3,
// TX power override
// DC/DC regulator: In Tx with 14 dBm PA setting, use DCDCCTL5[3:0]=0xF (DITHER_EN=1 and IPEAK=7). In Rx, use DCDCCTL5[3:0]=0xC (DITHER_EN=1 and IPEAK=4).
(uint32_t)0xFFFC08C3,
(uint32_t)0xFFFFFFFF,
};
// CMD_PROP_RADIO_DIV_SETUP
// Proprietary Mode Radio Setup Command for All Frequency Bands
rfc_CMD_PROP_RADIO_DIV_SETUP_t rf_cmd_prop_radio_div_setup =
{
.commandNo = 0x3807,
.status = 0x0000,
.pNextOp = 0,
.startTime = 0x00000000,
.startTrigger.triggerType = 0x0,
.startTrigger.bEnaCmd = 0x0,
.startTrigger.triggerNo = 0x0,
.startTrigger.pastTrig = 0x0,
.condition.rule = 0x1,
.condition.nSkip = 0x0,
.modulation.modType = 0x1,
.modulation.deviation = 0x64,
.symbolRate.preScale = 0xf,
.symbolRate.rateWord = 0x8000,
.rxBw = 0x24,
.preamConf.nPreamBytes = 0x3,
.preamConf.preamMode = 0x0,
.formatConf.nSwBits = 0x18,
.formatConf.bBitReversal = 0x0,
.formatConf.bMsbFirst = 0x1,
.formatConf.fecMode = 0x0,
/* 7: .4g mode with dynamic whitening and CRC choice */
.formatConf.whitenMode = 0x7,
.config.frontEndMode = 0x00, /* Set by the driver */
.config.biasMode = 0x00, /* Set by the driver */
.config.analogCfgMode = 0x0,
.config.bNoFsPowerUp = 0x0,
.txPower = 0x00, /* Driver sets correct value */
.pRegOverride = pOverrides,
.intFreq = 0x8000,
.centerFreq = 868,
.loDivider = 0x05,
};
// CMD_FS
// Frequency Synthesizer Programming Command
rfc_CMD_FS_t rf_cmd_prop_fs =
{
.commandNo = 0x0803,
.status = 0x0000,
.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
.startTime = 0x00000000,
.startTrigger.triggerType = 0x0,
.startTrigger.bEnaCmd = 0x0,
.startTrigger.triggerNo = 0x0,
.startTrigger.pastTrig = 0x0,
.condition.rule = 0x1,
.condition.nSkip = 0x0,
.frequency = 0x0364,
.fractFreq = 0x0000,
.synthConf.bTxMode = 0x0,
.synthConf.refFreq = 0x0,
.__dummy0 = 0x00,
.__dummy1 = 0x00,
.__dummy2 = 0x00,
.__dummy3 = 0x0000,
};
/* CMD_PROP_TX_ADV */
rfc_CMD_PROP_TX_ADV_t rf_cmd_prop_tx_adv =
{
.commandNo = 0x3803,
.status = 0x0000,
.pNextOp = 0,
.startTime = 0x00000000,
.startTrigger.triggerType = TRIG_NOW,
.startTrigger.bEnaCmd = 0x0,
.startTrigger.triggerNo = 0x0,
.startTrigger.pastTrig = 0x0,
.condition.rule = 0x1,
.condition.nSkip = 0x0,
.pktConf.bFsOff = 0x0,
.pktConf.bUseCrc = 0x1,
.pktConf.bCrcIncSw = 0x0, /* .4g mode */
.pktConf.bCrcIncHdr = 0x0, /* .4g mode */
.numHdrBits = 0x10 /* 16: .4g mode */,
.pktLen = 0x0000,
.startConf.bExtTxTrig = 0x0,
.startConf.inputMode = 0x0,
.startConf.source = 0x0,
.preTrigger.triggerType = TRIG_NOW,
.preTrigger.bEnaCmd = 0x0,
.preTrigger.triggerNo = 0x0,
.preTrigger.pastTrig = 0x1,
.preTime = 0x00000000,
.syncWord = 0x0055904e,
.pPkt = 0,
};
/*---------------------------------------------------------------------------*/
/* CMD_PROP_RX_ADV */
rfc_CMD_PROP_RX_ADV_t rf_cmd_prop_rx_adv =
{
.commandNo = 0x3804,
.status = 0x0000,
.pNextOp = 0,
.startTime = 0x00000000,
.startTrigger.triggerType = 0x0,
.startTrigger.bEnaCmd = 0x0,
.startTrigger.triggerNo = 0x0,
.startTrigger.pastTrig = 0x0,
.condition.rule = 0x1,
.condition.nSkip = 0x0,
.pktConf.bFsOff = 0x0,
.pktConf.bRepeatOk = 0x1,
.pktConf.bRepeatNok = 0x1,
.pktConf.bUseCrc = 0x1,
.pktConf.bCrcIncSw = 0x0, /* .4g mode */
.pktConf.bCrcIncHdr = 0x0, /* .4g mode */
.pktConf.endType = 0x0,
.pktConf.filterOp = 0x1,
.rxConf.bAutoFlushIgnored = 0x1,
.rxConf.bAutoFlushCrcErr = 0x1,
.rxConf.bIncludeHdr = 0x0,
.rxConf.bIncludeCrc = 0x0,
.rxConf.bAppendRssi = 0x1,
.rxConf.bAppendTimestamp = 0x0,
.rxConf.bAppendStatus = 0x1,
.syncWord0 = 0x0055904e,
.syncWord1 = 0x00000000,
.maxPktLen = 0x0000, /* To be populated by the driver. */
.hdrConf.numHdrBits = 0x10, /* 16: .4g mode */
.hdrConf.lenPos = 0x0, /* .4g mode */
.hdrConf.numLenBits = 0x0B, /* 11 = 0x0B .4g mode */
.addrConf.addrType = 0x0,
.addrConf.addrSize = 0x0,
.addrConf.addrPos = 0x0,
.addrConf.numAddr = 0x0,
.lenOffset = -4, /* .4g mode */
.endTrigger.triggerType = TRIG_NEVER,
.endTrigger.bEnaCmd = 0x0,
.endTrigger.triggerNo = 0x0,
.endTrigger.pastTrig = 0x0,
.endTime = 0x00000000,
.pAddr = 0,
.pQueue = 0,
.pOutput = 0,
};
/*---------------------------------------------------------------------------*/