50 lines
1.1 KiB
INI
50 lines
1.1 KiB
INI
# STM32 Cortex M3
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32F10xxx
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0xffffffff
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}
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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jtag_nsrst_delay 1
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# The target
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant cortex_m3
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0
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if { [info exists BSTAPID ] } {
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set _BSTAPID $BSTAPID
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} else {
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# force an error till we get a good number
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set _BSTAPID 0xffffffff
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}
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#jtag scan chain
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jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID
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flash bank stm32x 0 0 0 0 0
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