286 lines
9.5 KiB
C
286 lines
9.5 KiB
C
/*
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* Copyright (c) 2016, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup arm-cm-mtarch
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* @{
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*
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* \file
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* Implmentation of the ARM Cortex-M support for Contiki multi-threading.
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*/
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#include CMSIS_DEV_HDR
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#include "sys/mt.h"
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#include <stdint.h>
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#define EXC_RETURN_PROCESS_THREAD_BASIC_FRAME 0xfffffffd
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/* Check whether EXC_RETURN[3:0] in LR indicates a preempted process thread. */
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#if __ARM_ARCH == 7
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#define PREEMPTED_PROCESS_THREAD() \
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"and r0, lr, #0xf\n\t" \
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"cmp r0, #0xd\n\t"
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#elif __ARM_ARCH == 6
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#define PREEMPTED_PROCESS_THREAD() \
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"mov r0, lr\n\t" \
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"movs r1, #0xf\n\t" \
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"and r0, r1\n\t" \
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"cmp r0, #0xd\n\t"
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#else
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#error Unsupported ARM architecture
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#endif
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/*----------------------------------------------------------------------------*/
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/**
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* \brief SVCall system handler
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*
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* This exception handler executes the action requested by the corresponding
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* \c svc instruction, which is a task switch from the main Contiki thread to an
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* mt thread or the other way around.
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*/
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__attribute__ ((__naked__))
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void
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svcall_handler(void)
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{
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/* This is a controlled system handler, so do not use ENERGEST_TYPE_IRQ. */
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/*
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* Decide whether to switch to the main thread or to a process thread,
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* depending on the type of the thread preempted by SVCall.
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*/
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__asm__ (PREEMPTED_PROCESS_THREAD()
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#if __ARM_ARCH == 7
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"it eq\n\t"
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#endif
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"beq switch_to_main_thread\n\t"
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/*
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* - Retrieve from the main stack the PSP passed to SVCall through R0. Note
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* that it cannot be retrieved directly from R0 on exception entry because
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* this register may have been overwritten by other exceptions on SVCall
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* entry.
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* - Save the main thread context to the main stack.
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* - Restore the process thread context from the process stack.
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* - Return to Thread mode, resuming the process thread.
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*/
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#if __ARM_ARCH == 7
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"ldr r0, [sp]\n\t"
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"push {r4-r11, lr}\n\t"
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"add r1, r0, #9 * 4\n\t"
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"msr psp, r1\n\t"
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"ldmia r0, {r4-r11, pc}");
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#elif __ARM_ARCH == 6
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"mov r0, r8\n\t"
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"mov r1, r9\n\t"
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"mov r2, r10\n\t"
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"mov r3, r11\n\t"
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"push {r0-r7, lr}\n\t"
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"ldr r0, [sp, #9 * 4]\n\t"
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"ldmia r0!, {r4-r7}\n\t"
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"mov r8, r4\n\t"
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"mov r9, r5\n\t"
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"mov r10, r6\n\t"
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"mov r11, r7\n\t"
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"ldmia r0!, {r3-r7}\n\t"
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"msr psp, r0\n\t"
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"bx r3");
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#endif
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}
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/*----------------------------------------------------------------------------*/
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/**
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* \brief PendSV system handler
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*
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* This exception handler executes following a call to mtarch_pstart() from
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* another exception handler. It performs a task switch to the main Contiki
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* thread if it is not already running.
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*/
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__attribute__ ((__naked__))
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void
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pendsv_handler(void)
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{
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/* This is a controlled system handler, so do not use ENERGEST_TYPE_IRQ. */
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/*
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* Return without doing anything if PendSV has not preempted a process thread.
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* This can occur either because PendSV has preempted the main thread, in
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* which case there is nothing to do, or because mtarch_pstart() has been
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* called from an exception handler without having called mt_init() first, in
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* which case PendSV may have preempted an exception handler and nothing must
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* be done because mt is not active.
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*/
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__asm__ ( PREEMPTED_PROCESS_THREAD()
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#if __ARM_ARCH == 7
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"it ne\n\t"
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"bxne lr\n"
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#elif __ARM_ARCH == 6
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"beq switch_to_main_thread\n\t"
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"bx lr\n"
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#endif
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/*
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* - Save the process thread context to the process stack.
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* - Place into the main stack the updated PSP that SVCall must return through
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* R0.
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* - Restore the main thread context from the main stack.
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* - Return to Thread mode, resuming the main thread.
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*/
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"switch_to_main_thread:\n\t"
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"mrs r0, psp\n\t"
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#if __ARM_ARCH == 7
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"stmdb r0!, {r4-r11, lr}\n\t"
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"str r0, [sp, #9 * 4]\n\t"
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"pop {r4-r11, pc}");
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#elif __ARM_ARCH == 6
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"mov r3, lr\n\t"
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"sub r0, #5 * 4\n\t"
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"stmia r0!, {r3-r7}\n\t"
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"mov r4, r8\n\t"
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"mov r5, r9\n\t"
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"sub r0, #9 * 4\n\t"
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"mov r6, r10\n\t"
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"mov r7, r11\n\t"
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"stmia r0!, {r4-r7}\n\t"
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"pop {r4-r7}\n\t"
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"sub r0, #4 * 4\n\t"
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"mov r8, r4\n\t"
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"mov r9, r5\n\t"
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"str r0, [sp, #5 * 4]\n\t"
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"mov r10, r6\n\t"
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"mov r11, r7\n\t"
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"pop {r4-r7, pc}");
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#endif
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_init(void)
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{
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SCB->CCR = (SCB->CCR
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#ifdef SCB_CCR_NONBASETHRDENA_Msk
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/*
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* Make sure that any attempt to enter Thread mode with exceptions
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* active faults.
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*
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* Only SVCall and PendSV are allowed to forcibly enter Thread
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* mode, and they are configured with the same, lowest exception
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* priority, so no other exceptions may be active.
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*/
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& ~SCB_CCR_NONBASETHRDENA_Msk
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#endif
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/*
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* Force 8-byte stack pointer alignment on exception entry in order
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* to be able to use AAPCS-conforming functions as exception
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* handlers.
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*/
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) | SCB_CCR_STKALIGN_Msk;
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/*
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* Configure SVCall and PendSV with the same, lowest exception priority.
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*
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* This makes sure that they cannot preempt each other, and that the processor
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* executes them after having handled all other exceptions. If both are
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* pending at the same time, then SVCall takes precedence because of its lower
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* exception number. In addition, the associated exception handlers do not
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* have to check whether they are returning to Thread mode, because they
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* cannot preempt any other exception.
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*/
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NVIC_SetPriority(SVCall_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
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NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
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/*
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* Force the preceding configurations to take effect before further
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* operations.
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*/
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__DSB();
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__ISB();
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_start(struct mtarch_thread *thread,
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void (*function)(void *data), void *data)
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{
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struct mtarch_thread_context *context = &thread->start_stack.context;
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/*
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* Initialize the thread context with the appropriate values to call
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* function() with data and to make function() return to mt_exit() without
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* having to call it explicitly.
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*/
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context->exc_return = EXC_RETURN_PROCESS_THREAD_BASIC_FRAME;
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context->r0 = (uint32_t)data;
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context->lr = (uint32_t)mt_exit;
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context->pc = (uint32_t)function;
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context->xpsr = xPSR_T_Msk;
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thread->psp = (uint32_t)context;
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_exec(struct mtarch_thread *thread)
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{
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/* Pass the PSP to SVCall, and get the updated PSP as its return value. */
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register uint32_t psp __asm__ ("r0") = thread->psp;
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__asm__ volatile ("svc #0"
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: "+r" (psp)
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:: "memory");
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thread->psp = psp;
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}
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/*----------------------------------------------------------------------------*/
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__attribute__ ((__naked__))
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void
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mtarch_yield(void)
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{
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/* Invoke SVCall. */
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__asm__ ("svc #0\n\t"
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"bx lr");
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_stop(struct mtarch_thread *thread)
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{
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_pstart(void)
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{
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/* Trigger PendSV. */
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SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_pstop(void)
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{
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}
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/*----------------------------------------------------------------------------*/
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void
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mtarch_remove(void)
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{
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}
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/*----------------------------------------------------------------------------*/
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/** @} */
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