e4bc1a1e8c
The x86/init/common/ folder holds all cpu initialization code - idt and gdt setup, interrupts and cpu initialization. On this folder will also sit any SoC specific implementation of the functions called from cpu_init().
137 lines
5.2 KiB
C
137 lines
5.2 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdint.h>
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#define NUM_DESC 3
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/* Each define here is for a specific flag in the descriptor. Refer to Intel
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* Combined Manual (Intel 64 and IA-32 Architectures Software Developer's
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* Manual), Vol. 3, Section 3.4.5 for a description of each flag.
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*/
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#define SEG_DESCTYPE(x) ((x) << 0x04) /* Descriptor type (0 for system, 1 for code/data) */
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#define SEG_PRES(x) ((x) << 0x07) /* Present */
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#define SEG_SAVL(x) ((x) << 0x0C) /* Available for system use */
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#define SEG_LONG(x) ((x) << 0x0D) /* Long mode */
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#define SEG_SIZE(x) ((x) << 0x0E) /* Size (0 for 16-bit, 1 for 32) */
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#define SEG_GRAN(x) ((x) << 0x0F) /* Granularity (0 for 1B - 1MB, 1 for 4KB - 4GB) */
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#define SEG_PRIV(x) (((x) & 0x03) << 0x05) /* Set privilege level (0 - 3) */
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#define SEG_DATA_RDWR 0x02 /* Read/Write */
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#define SEG_CODE_EXRD 0x0A /* Execute/Read */
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#define GDT_CODE_PL0 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(0) | SEG_CODE_EXRD
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#define GDT_DATA_PL0 SEG_DESCTYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \
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SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \
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SEG_PRIV(0) | SEG_DATA_RDWR
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typedef struct gdtr
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{
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uint16_t limit;
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uint32_t base;
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} __attribute__((packed)) gdtr_t;
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typedef uint64_t segment_desc_t;
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/* From Intel Combined Manual, Vol. 3 , Section 3.5.1: The base addresses of
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* the GDT should be aligned on an eight-byte boundary to yield the best
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* processor performance.
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*/
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static segment_desc_t gdt[NUM_DESC] __attribute__ ((aligned (8)));
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static void
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set_descriptor(unsigned int index, uint32_t base, uint32_t limit, uint16_t flag)
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{
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segment_desc_t descriptor;
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if (index >= NUM_DESC)
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return;
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/* Create the high 32 bit segment */
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descriptor = limit & 0x000F0000; /* set limit bits 19:16 */
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descriptor |= (flag << 8) & 0x00F0FF00; /* set type, p, dpl, s, g, d/b, l and avl fields */
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descriptor |= (base >> 16) & 0x000000FF; /* set base bits 23:16 */
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descriptor |= base & 0xFF000000; /* set base bits 31:24 */
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/* Shift by 32 to allow for low part of segment */
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descriptor <<= 32;
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/* Create the low 32 bit segment */
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descriptor |= base << 16; /* set base bits 15:0 */
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descriptor |= limit & 0x0000FFFF; /* set limit bits 15:0 */
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/* Save descriptor into gdt */
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gdt[index] = descriptor;
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}
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/* This function initializes the Global Offset Table. For simplicity, the
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* memory is organized following the flat model. Thus, memory appears to
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* Contiki as a single continuous address space. Code, data, and stack
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* are all contained in this address space (so called linear address space).
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*/
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void
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gdt_init(void)
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{
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gdtr_t gdtr;
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/* Initialize gdtr structure */
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gdtr.limit = sizeof(segment_desc_t) * NUM_DESC - 1;
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gdtr.base = (uint32_t) &gdt;
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/* Initialize descriptors */
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set_descriptor(0, 0, 0, 0);
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set_descriptor(1, 0, 0x0FFFFF, GDT_CODE_PL0);
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set_descriptor(2, 0, 0x0FFFFF, GDT_DATA_PL0);
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/* Load GDTR register and update segment registers.
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*
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* In protected mode, segment registers should be loaded according to
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* the offset in GDT. So DS, SS, ES, FS and GS registers should be
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* loadded with 0x10 while CS with 0x08. CS register cannot be changed
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* directly. For that reason, we do a far jump.
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*/
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__asm__ ("lgdt %0\n\t"
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"jmp $0x08, $1f\n\t"
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"1:\n\t"
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"mov $0x10, %%ax\n\t"
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"mov %%ax, %%ds\n\t"
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"mov %%ax, %%ss\n\t"
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"mov %%ax, %%es\n\t"
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"mov %%ax, %%fs\n\t"
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"mov %%ax, %%gs\n\t"
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:
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: "m" (gdtr)
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);
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}
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