172 lines
4.6 KiB
C
172 lines
4.6 KiB
C
/*
|
|
* Copyright (c) 2005, Swedish Institute of Computer Science
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
|
|
* 3. Neither the name of the Institute nor the names of its contributors
|
|
* may be used to endorse or promote products derived from this software
|
|
* without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
* SUCH DAMAGE.
|
|
*
|
|
* This file is part of the Contiki operating system.
|
|
*
|
|
* @(#)$Id: clock.c,v 1.7 2007/05/22 20:59:27 adamdunkels Exp $
|
|
*/
|
|
|
|
|
|
#include <io.h>
|
|
#include <signal.h>
|
|
|
|
#include "contiki-conf.h"
|
|
|
|
#include "lib/energest.h"
|
|
#include "sys/clock.h"
|
|
#include "sys/etimer.h"
|
|
|
|
/* 38400 cycles @ 2.4576MHz with divisor 8 ==> 1/8 s */
|
|
/* #define INTERVAL (307200ULL / CLOCK_SECOND) */
|
|
#define INTERVAL (4096ULL / CLOCK_SECOND)
|
|
|
|
#define MAX_TICKS (~((clock_time_t)0) / 2)
|
|
|
|
static volatile clock_time_t count = 0;
|
|
static unsigned short last_tar = 0;
|
|
/*---------------------------------------------------------------------------*/
|
|
interrupt(TIMERA1_VECTOR) timera1 (void) {
|
|
ENERGEST_ON(ENERGEST_TYPE_IRQ);
|
|
if(TAIV == 2) {
|
|
TACCR1 += INTERVAL;
|
|
last_tar = TAR;
|
|
++count;
|
|
|
|
if(etimer_pending()
|
|
&& (etimer_next_expiration_time() - count - 1) > MAX_TICKS) {
|
|
etimer_request_poll();
|
|
LPM4_EXIT;
|
|
}
|
|
}
|
|
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
clock_time_t
|
|
clock_time(void)
|
|
{
|
|
return count;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
clock_set(clock_time_t clock, clock_time_t fclock)
|
|
{
|
|
TAR = fclock;
|
|
TACCR1 = fclock + INTERVAL;
|
|
count = clock;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
int
|
|
clock_fine_max(void)
|
|
{
|
|
return INTERVAL;
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
unsigned short
|
|
clock_fine(void)
|
|
{
|
|
unsigned short t;
|
|
|
|
dint();
|
|
t = TAR;
|
|
eint();
|
|
|
|
return (unsigned short)((unsigned long)t - (unsigned long)last_tar);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
clock_init(void)
|
|
{
|
|
dint();
|
|
|
|
/* Select SMCLK (2.4576MHz), clear TAR */
|
|
/* TACTL = TASSEL1 | TACLR | ID_3; */
|
|
/* Select ACLK 32768Hz clock, divide by 8 */
|
|
TACTL = TASSEL0 | TACLR | ID_3;
|
|
|
|
/* Initialize ccr1 to create the X ms interval. */
|
|
/* CCR1 interrupt enabled, interrupt occurs when timer equals CCR1. */
|
|
TACCTL1 = CCIE;
|
|
|
|
/* Interrupt after X ms. */
|
|
TACCR1 = INTERVAL;
|
|
|
|
/* Start Timer_A in continuous mode. */
|
|
TACTL |= MC1;
|
|
|
|
count = 0;
|
|
|
|
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
|
|
|
|
/* Enable interrupts. */
|
|
eint();
|
|
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* Delay the CPU for a multiple of 2.83 us.
|
|
*/
|
|
void
|
|
clock_delay(unsigned int i)
|
|
{
|
|
asm("add #-1, r15");
|
|
asm("jnz $-2");
|
|
/*
|
|
* This means that delay(i) will delay the CPU for CONST + 3x
|
|
* cycles. On a 2.4756 CPU, this means that each i adds 1.22us of
|
|
* delay.
|
|
*
|
|
* do {
|
|
* --i;
|
|
* } while(i > 0);
|
|
*/
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
/**
|
|
* Wait for a multiple of 10 ms.
|
|
*
|
|
*/
|
|
void
|
|
clock_wait(int i)
|
|
{
|
|
clock_time_t start;
|
|
|
|
start = clock_time();
|
|
while(clock_time() - start < (clock_time_t)i);
|
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
void
|
|
clock_set_seconds(unsigned long sec)
|
|
{
|
|
|
|
}
|
|
unsigned long
|
|
clock_seconds(void)
|
|
{
|
|
return count / CLOCK_SECOND;
|
|
}
|