80 lines
3.2 KiB
C
80 lines
3.2 KiB
C
/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "pci.h"
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#include "helpers.h"
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/* I/O port for PCI configuration address */
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#define PCI_CONFIG_ADDR_PORT 0xCF8
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/* I/O port for PCI configuration data */
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#define PCI_CONFIG_DATA_PORT 0xCFC
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/*---------------------------------------------------------------------------*/
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/* Initialize PCI configuration register address in preparation for accessing
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* the specified register.
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*/
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static void
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set_addr(pci_config_addr_t addr)
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{
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addr.en_mapping = 1;
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outl(PCI_CONFIG_ADDR_PORT, addr.raw);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Read from the specified PCI configuration register.
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* \param addr Address of PCI configuration register.
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* \return Value read from PCI configuration register.
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*/
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uint32_t
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pci_config_read(pci_config_addr_t addr)
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{
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set_addr(addr);
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return inl(PCI_CONFIG_DATA_PORT);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Initialize a structure for a PCI device driver that performs
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* MMIO to address range 0. Assumes that device has already
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* been configured with an MMIO address range 0, e.g. by
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* firmware.
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* \param c_this Structure that will be initialized to represent the driver.
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* \param pci_addr PCI base address of device.
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*/
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void
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pci_init_bar0(pci_driver_t *c_this, pci_config_addr_t pci_addr)
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{
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pci_addr.reg_off = PCI_CONFIG_REG_BAR0;
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/* The BAR0 value is masked to clear non-address bits. */
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c_this->mmio = pci_config_read(pci_addr) & ~0xFFF;
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}
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/*---------------------------------------------------------------------------*/
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