nes-proj/cpu/arm/common/CMSIS
Benoît Thébaudeau 9195b49c18 ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled()
This function returns the enable state of an interrupt.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2016-11-24 22:30:26 +01:00
..
cmsis_armcc_V6.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
cmsis_armcc.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
cmsis_gcc.h ARM: CMSIS-CORE: Fix doxygen warnings 2016-11-24 22:30:26 +01:00
core_cm0.h ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled() 2016-11-24 22:30:26 +01:00
core_cm0plus.h ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled() 2016-11-24 22:30:26 +01:00
core_cm3.h ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled() 2016-11-24 22:30:26 +01:00
core_cm4.h ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled() 2016-11-24 22:30:26 +01:00
core_cm7.h ARM: CMSIS-CORE: Introduce NVIC_IsIRQEnabled() 2016-11-24 22:30:26 +01:00
core_cmFunc.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
core_cmInstr.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
core_cmSimd.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
core_sc000.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
core_sc300.h ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00
core.txt ARM: CMSIS-CORE: Bump version to 4.30 2016-11-24 22:30:26 +01:00