613 lines
20 KiB
C
613 lines
20 KiB
C
/*
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* Copyright (c) 2015 NXP B.V.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of NXP B.V. nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY NXP B.V. AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NXP B.V. OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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* Author: Lee Mitchell
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* Integrated into Contiki by Beshr Al Nahas
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*
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*/
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#include <jendefs.h>
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#ifdef DEBUG
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#include <dbg.h>
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#else
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#define DBG_vPrintf(...)
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#endif
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#include "contiki-conf.h"
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#include "uart-driver.h"
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#include "sys/rtimer.h"
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#include "watchdog.h"
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#include <math.h>
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#include <AppHardwareApi.h>
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#if UART_XONXOFF_FLOW_CTRL
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#include "sys/process.h"
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#define TX_FIFO_SW_FLOW_LIMIT 8 /* Maximum allowed fill level for tx fifo */
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#if TX_FIFO_SW_FLOW_LIMIT > 16
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#undef TX_FIFO_SW_FLOW_LIMIT
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#define TX_FIFO_SW_FLOW_LIMIT 16
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#warning "TX_FIFO_SW_FLOW_LIMIT too big. Forced to 16."
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#endif /* TX_FIFO_SW_FLOW_LIMIT > 16 */
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#define XON 17
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#define XOFF 19
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extern volatile unsigned char xonxoff_state;
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#endif /* UART_XONXOFF_FLOW_CTRL */
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/*** Macro Definitions ***/
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#define BUSYWAIT_UNTIL(cond, max_time) \
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do { \
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rtimer_clock_t t0; \
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t0 = RTIMER_NOW(); \
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while(!(cond) && RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + (max_time))) ; \
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} while(0)
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#define DEBUG_UART_BUFFERED FALSE
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#define CHAR_DEADLINE (uart_char_delay * 100)
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/*** Local Function Prototypes ***/
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static void uart_driver_isr(uint32_t device_id, uint32_t item_bitmap);
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#if !UART_XONXOFF_FLOW_CTRL
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static int16_t uart_driver_get_tx_fifo_available_space(uint8_t uart_dev);
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#endif /* !UART_XONXOFF_FLOW_CTRL */
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static void uart_driver_set_baudrate(uint8_t uart_dev, uint8_t br);
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static void uart_driver_set_high_baudrate(uint8_t uart_dev, uint32_t baud_rate);
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/*** Local Variables ***/
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#define UART_NUM_UARTS 2
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static uint16_t tx_fifo_size[UART_NUM_UARTS] = { 0 };
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static uint8_t active_uarts[UART_NUM_UARTS] = { 0 };
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/** slip input function pointer */
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static int(*uart_input[UART_NUM_UARTS]) (unsigned char) = { 0 };
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/* time in uSec for transmitting 1 char */
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static uint16_t uart_char_delay = 0;
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static volatile int8_t interrupt_enabled[UART_NUM_UARTS] = { 0 };
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static volatile int8_t interrupt_enabled_saved[UART_NUM_UARTS] = { 0 };
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/****************************************************************************
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*
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* NAME: uart_driver_init
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*
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* DESCRIPTION:
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* Initializes the specified UART device.
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*
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* PARAMETERS: Name RW Usage
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* uart_dev R UART to initialise, eg, E_AHI_UART_0
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* br R Baudrate to use (e.g. UART_RATE_115200)
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* if br > UART_RATE_115200
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* then uart_driver_set_baud_rate is called
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* else vAHI_UartSetClockDivisor
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* txbuf_data R Pointer to a memory block to use
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* and rxbuf_data as uart tx/rx fifo
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* txbuf_size R size of tx fifo (valid range: 16-2047)
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* txbuf_size R size of rx fifo (valid range: 16-2047)
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* uart_input_function a function pointer to input uart rx bytes
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* RETURNS:
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* void
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*
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****************************************************************************/
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void
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uart_driver_init(uint8_t uart_dev, uint8_t br, uint8_t *txbuf_data,
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uint16_t txbuf_size, uint8_t *rxbuf_data, uint16_t rxbuf_size,
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int (*uart_input_function)(unsigned char c))
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{
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#if !UART_HW_FLOW_CTRL
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/* Disable RTS/CTS */
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vAHI_UartSetRTSCTS(uart_dev, FALSE);
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#endif
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tx_fifo_size[uart_dev] = txbuf_size;
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/* Configure the selected Uart */
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uint8_t uart_enabled = bAHI_UartEnable(uart_dev, txbuf_data, txbuf_size,
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rxbuf_data, rxbuf_size);
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/* fallback to internal buffers */
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if(!uart_enabled) {
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vAHI_UartEnable(uart_dev);
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tx_fifo_size[uart_dev] = 16; /* Fixed size */
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}
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/* Reset tx/rx fifos */
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vAHI_UartReset(uart_dev, TRUE, TRUE);
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vAHI_UartReset(uart_dev, FALSE, FALSE);
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uart_driver_set_baudrate(uart_dev, br);
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/* install interrupt service callback */
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if(uart_dev == E_AHI_UART_0) {
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vAHI_Uart0RegisterCallback((void *)uart_driver_isr);
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} else {
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vAHI_Uart1RegisterCallback((void *)uart_driver_isr);
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/* Enable RX interrupt */
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}
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uart_driver_enable_interrupts(uart_dev);
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uart_input[uart_dev] = uart_input_function;
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active_uarts[uart_dev] = 1;
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#if UART_HW_FLOW_CTRL
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/* Configure HW flow control */
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vAHI_UartSetAutoFlowCtrl(uart_dev, E_AHI_UART_FIFO_ARTS_LEVEL_13, /* uint8 const u8RxFifoLevel,*/
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FALSE, /* bool_t const bFlowCtrlPolarity,*/
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TRUE, /* bool_t const bAutoRts, */
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TRUE /* bool_t const bAutoCts */);
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#endif
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DBG_vPrintf("UART %d init: using %s buffers %d\n", uart_dev,
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uart_enabled ? "external" : "internal", tx_fifo_size[uart_dev]);
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}
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void
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uart_driver_enable_interrupts(uint8_t uart_dev)
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{
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/* wait while char being tx is done */
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while((u8AHI_UartReadLineStatus(uart_dev) & E_AHI_UART_LS_THRE) == 0) ;
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vAHI_UartSetInterrupt(uart_dev, FALSE /*bEnableModemStatus*/,
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FALSE /*bEnableRxLineStatus == Break condition */,
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FALSE /*bEnableTxFifoEmpty*/,
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TRUE /* bEnableRxData */, E_AHI_UART_FIFO_LEVEL_14);
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interrupt_enabled[uart_dev] = 1;
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}
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void
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uart_driver_disable_interrupts(uint8_t uart_dev)
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{
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/* wait while char being tx is done */
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while((u8AHI_UartReadLineStatus(uart_dev) & E_AHI_UART_LS_THRE) == 0) ;
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vAHI_UartSetInterrupt(uart_dev, FALSE /*bEnableModemStatus*/,
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FALSE /*bEnableRxLineStatus == Break condition */,
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FALSE /*bEnableTxFifoEmpty*/,
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FALSE /* bEnableRxData */, E_AHI_UART_FIFO_LEVEL_14);
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interrupt_enabled[uart_dev] = 0;
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}
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void
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uart_driver_store_interrupts(uint8_t uart_dev)
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{
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interrupt_enabled_saved[uart_dev] = interrupt_enabled[uart_dev];
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}
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void
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uart_driver_restore_interrupts(uint8_t uart_dev)
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{
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if(interrupt_enabled_saved[uart_dev]) {
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uart_driver_enable_interrupts(uart_dev);
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} else {
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uart_driver_disable_interrupts(uart_dev);
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}
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}
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int8_t
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uart_driver_interrupt_is_enabled(uint8_t uart_dev)
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{
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return interrupt_enabled[uart_dev];
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}
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void
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uart_driver_set_input(uint8_t uart_dev, int
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(*uart_input_function)(unsigned char c))
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{
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uart_input[uart_dev] = uart_input_function;
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}
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/****************************************************************************
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*
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* NAME: uart_driver_read
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*
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* DESCRIPTION:
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* Reads 1 byte from the RX buffer. If there is no data in the
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* buffer, then return FALSE
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*
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* PARAMETERS: Name RW Usage
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* uart_dev R UART to use, eg, E_AHI_UART_0
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*
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* RETURNS:
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* TRUE if a byte has been read from the queue
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*
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****************************************************************************/
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uint8_t
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uart_driver_read(uint8_t uart_dev, uint8_t *data)
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{
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if(data && u16AHI_UartReadRxFifoLevel(uart_dev) > 0) {
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*data = u8AHI_UartReadData(uart_dev);
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return TRUE;
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}
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return FALSE;
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}
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void
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uart_driver_write_buffered(uint8_t uart_dev, uint8_t ch)
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{
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uart_driver_write_with_deadline(uart_dev, ch);
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}
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/****************************************************************************
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*
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* NAME: uart_driver_write_with_deadline
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*
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* DESCRIPTION:
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* Writes one byte to the specified uart for transmission
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*
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* PARAMETERS: Name RW Usage
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* uart_dev R UART to use, eg, E_AHI_UART_0
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* ch R data to transmit
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*
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* RETURNS:
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* void
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*
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****************************************************************************/
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void
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uart_driver_write_with_deadline(uint8_t uart_dev, uint8_t ch)
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{
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#if UART_XONXOFF_FLOW_CTRL
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/* Block until host can receive data */
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/* Wait until there are less than N characters in TX FIFO */
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while(xonxoff_state != XON
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|| u16AHI_UartReadTxFifoLevel(uart_dev) > TX_FIFO_SW_FLOW_LIMIT) {
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watchdog_periodic();
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}
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/* write to TX FIFO and return immediately */
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vAHI_UartWriteData(uart_dev, ch);
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#else /* UART_XONXOFF_FLOW_CTRL */
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volatile int16_t write = 0;
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watchdog_periodic();
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/* wait until there is space in tx fifo */
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BUSYWAIT_UNTIL(write = (uart_driver_get_tx_fifo_available_space(uart_dev) > 0),
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CHAR_DEADLINE);
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/* write only if there is space so we do not get stuck */
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if(write) {
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/* write to TX FIFO and return immediately */
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vAHI_UartWriteData(uart_dev, ch);
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}
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#endif /* UART_XONXOFF_FLOW_CTRL */
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}
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void
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uart_driver_write_direct(uint8_t uart_dev, uint8_t ch)
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{
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/* Write character */
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vAHI_UartWriteData(uart_dev, ch);
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/* Wait for buffers to empty */
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while((u8AHI_UartReadLineStatus(uart_dev) & E_AHI_UART_LS_THRE) == 0) ;
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while((u8AHI_UartReadLineStatus(uart_dev) & E_AHI_UART_LS_TEMT) == 0) ;
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}
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/****************************************************************************
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*
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* NAME: uart_driver_rx_handler
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*
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* DESCRIPTION:
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* Interrupt service callback for UART data reception. Reads a received
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* byte from the UART and writes it to the reception buffer if it is not
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* full.
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*
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* PARAMETERS: Name RW Usage
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* uart_dev R Uart to read from
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*
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* RETURNS:
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* void
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*
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****************************************************************************/
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void
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uart_driver_rx_handler(uint8_t uart_dev)
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{
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/* optimization for high throughput: Read upto 32 bytes from RX fifo.
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* Disabled because it does not work with current slip_input_byte */
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/* Status from uart_input:
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* 0 means do not exit power saving mode
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* -1 means RX buffer overflow ==> stop reading
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* 1 means end of slip packet
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*/
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#if UART_XONXOFF_FLOW_CTRL
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/* save old status */
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int xonxoff_state_old = xonxoff_state;
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#endif /* UART_XONXOFF_FLOW_CTRL */
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int status = 0;
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int c = 0;
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while(u16AHI_UartReadRxFifoLevel(uart_dev) > 0 && c++ < 32 && status == 0) {
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if(uart_input[uart_dev] != NULL) { /* read one char at a time */
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/* process received character */
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status = (uart_input[uart_dev])(u8AHI_UartReadData(uart_dev));
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#if UART_XONXOFF_FLOW_CTRL
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/* Process XON-XOFF*/
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if(xonxoff_state == XOFF) {
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/* XXX do not set break condition as it corrupts one character, instead we block on TX */
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/* Instruct uart to stop TX */
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/* vAHI_UartSetBreak(uart_dev, TRUE); */
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break;
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} else if(xonxoff_state_old == XOFF && xonxoff_state == XON) {
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/* Instruct uart to resume TX if it was stopped */
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/* vAHI_UartSetBreak(uart_dev, FALSE); */
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}
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#endif /* UART_XONXOFF_FLOW_CTRL */
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} else {
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/* no input handler, or no bytes to read: Discard byte. */
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u8AHI_UartReadData(uart_dev);
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}
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}
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}
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/****************************************************************************/
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/*** Local Functions ***/
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/****************************************************************************/
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#if !UART_XONXOFF_FLOW_CTRL
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/* Returns the free space in tx fifo, i.e., how many characters we can put */
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static int16_t
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uart_driver_get_tx_fifo_available_space(uint8_t uart_dev)
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{
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return tx_fifo_size[uart_dev] - u16AHI_UartReadTxFifoLevel(uart_dev);
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}
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#endif /* !UART_XONXOFF_FLOW_CTRL */
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/* Initializes the specified UART with auto-selection of
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baudrate tuning method */
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static void
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uart_driver_set_baudrate(uint8_t uart_dev, uint8_t br)
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{
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uint32_t high_br = 0;
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uint8_t low_br = 0;
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switch(br) {
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case UART_RATE_4800:
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low_br = E_AHI_UART_RATE_4800;
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uart_char_delay = 1667;
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break;
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case UART_RATE_9600:
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low_br = E_AHI_UART_RATE_9600;
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uart_char_delay = 834;
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break;
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case UART_RATE_19200:
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low_br = E_AHI_UART_RATE_19200;
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uart_char_delay = 417;
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break;
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case UART_RATE_38400:
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low_br = E_AHI_UART_RATE_38400;
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uart_char_delay = 209;
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break;
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case UART_RATE_76800:
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low_br = E_AHI_UART_RATE_76800;
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uart_char_delay = 105;
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break;
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case UART_RATE_115200:
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low_br = E_AHI_UART_RATE_115200;
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uart_char_delay = 69;
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break;
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case UART_RATE_230400:
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high_br = 230400UL;
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uart_char_delay = 35;
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break;
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case UART_RATE_460800:
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high_br = 460800UL;
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uart_char_delay = 18;
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break;
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case UART_RATE_500000:
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high_br = 500000UL;
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uart_char_delay = 16;
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break;
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case UART_RATE_576000:
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high_br = 576000UL;
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uart_char_delay = 14;
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break;
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case UART_RATE_921600:
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high_br = 921600UL;
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uart_char_delay = 9;
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break;
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case UART_RATE_1000000:
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high_br = 1000000UL;
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uart_char_delay = 8;
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break;
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default:
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high_br = 1000000UL;
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uart_char_delay = 8;
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break;
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}
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if(high_br == 0) {
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vAHI_UartSetClockDivisor(uart_dev, low_br);
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} else {
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uart_driver_set_high_baudrate(uart_dev, high_br);
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}
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}
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/****************************************************************************
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*
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* NAME: uart_driver_set_high_baudrate
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*
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* DESCRIPTION:
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* Sets the baud rate for the specified uart
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*
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* PARAMETERS: Name RW Usage
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* uart_dev R UART to initialise, eg, E_AHI_UART_0
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* baud_rate R Baudrate to use (bps eg 921600)
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*
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* RETURNS:
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* void
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*
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****************************************************************************/
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static void
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uart_driver_set_high_baudrate(uint8_t uart_dev, uint32_t baud_rate)
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{
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uint16 u16Divisor = 1;
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uint32_t u32Remainder;
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uint8_t u8ClocksPerBit = 16;
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#if (ENABLE_ADVANCED_BAUD_SELECTION)
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/* Defining ENABLE_ADVANCED_BAUD_SELECTION in the Makefile
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* enables this code which searches for a clocks per bit setting
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* that gets closest to the configured rate.
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*/
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uint32_t u32CalcBaudRate = 0;
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int32 i32BaudError = 0x7FFFFFFF;
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DBG_vPrintf(DEBUG_UART_BUFFERED, "Config uart=%d, baud=%d\n", uart_dev,
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baud_rate);
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while(ABS(i32BaudError) > (int32)(baud_rate >> 4)) { /* 6.25% (100/16) error */
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if(--u8ClocksPerBit < 3) {
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DBG_vPrintf(DEBUG_UART_BUFFERED,
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"Could not calculate UART settings for target baud!");
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return;
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}
|
|
#endif /* ENABLE_ADVANCED_BAUD_SELECTION */
|
|
|
|
/* Calculate Divisor register = 16MHz / (16 x baud rate) */
|
|
u16Divisor = (uint16)(16000000UL / ((u8ClocksPerBit + 1) * baud_rate));
|
|
|
|
/* Correct for rounding errors */
|
|
u32Remainder =
|
|
(uint32_t)(16000000UL % ((u8ClocksPerBit + 1) * baud_rate));
|
|
|
|
if(u32Remainder >= (((u8ClocksPerBit + 1) * baud_rate) / 2)) {
|
|
u16Divisor += 1;
|
|
}
|
|
#if (ENABLE_ADVANCED_BAUD_SELECTION)
|
|
DBG_vPrintf(DEBUG_UART_BUFFERED, "Divisor=%d, cpb=%d\n", u16Divisor,
|
|
u8ClocksPerBit);
|
|
|
|
u32CalcBaudRate = (16000000UL / ((u8ClocksPerBit + 1) * u16Divisor));
|
|
|
|
DBG_vPrintf(DEBUG_UART_BUFFERED, "Calculated baud=%d\n", u32CalcBaudRate);
|
|
|
|
i32BaudError = (int32)u32CalcBaudRate - (int32)baud_rate;
|
|
|
|
DBG_vPrintf(DEBUG_UART_BUFFERED, "Error baud=%d\n", i32BaudError);
|
|
}
|
|
DBG_vPrintf(DEBUG_UART_BUFFERED, "Config uart=%d: Divisor=%d, cpb=%d\n",
|
|
uart_dev, u16Divisor, u8ClocksPerBit);
|
|
|
|
/* Set the calculated clocks per bit */
|
|
vAHI_UartSetClocksPerBit(uart_dev, u8ClocksPerBit);
|
|
#endif /* ENABLE_ADVANCED_BAUD_SELECTION */
|
|
|
|
/* Set the calculated divisor */
|
|
vAHI_UartSetBaudDivisor(uart_dev, u16Divisor);
|
|
}
|
|
|
|
/****************************************************************************
|
|
*
|
|
* NAME: uart_driver_isr
|
|
*
|
|
* DESCRIPTION:
|
|
* Interrupt service callback for UART's
|
|
*
|
|
* PARAMETERS: Name RW Usage
|
|
* device_id R Device ID of whatever generated the
|
|
* interrupt
|
|
* item_bitmap R Which part of the device generated
|
|
* the interrupt
|
|
*
|
|
* RETURNS:
|
|
* void
|
|
*
|
|
****************************************************************************/
|
|
static void
|
|
uart_driver_isr(uint32_t device_id, uint32_t item_bitmap)
|
|
{
|
|
uint8_t uart_dev;
|
|
switch(device_id) {
|
|
case E_AHI_DEVICE_UART0:
|
|
uart_dev = E_AHI_UART_0;
|
|
break;
|
|
case E_AHI_DEVICE_UART1:
|
|
uart_dev = E_AHI_UART_1;
|
|
break;
|
|
default:
|
|
return;
|
|
}
|
|
switch(item_bitmap) {
|
|
/* byte available since a long time but RX-fifo not full: */
|
|
case E_AHI_UART_INT_TIMEOUT:
|
|
/* RX-fifo full: */
|
|
case E_AHI_UART_INT_RXDATA:
|
|
uart_driver_rx_handler(uart_dev);
|
|
break;
|
|
case E_AHI_UART_INT_TX:
|
|
break;
|
|
case E_AHI_UART_INT_RXLINE:
|
|
/* rx-line interrupt is disabled. Should not get here */
|
|
/* An error condition has occurred on the RxD line, such as
|
|
a break indication, framing error, parity error or over-run. */
|
|
break;
|
|
}
|
|
}
|
|
/****************************************************************************
|
|
*
|
|
* NAME: uart_driver_tx_in_progress
|
|
*
|
|
* DESCRIPTION:
|
|
* Returns the state of data transmission
|
|
*
|
|
* PARAMETERS: Name RW Usage
|
|
* uart_dev R UART to use, eg, E_AHI_UART_0
|
|
*
|
|
* RETURNS:
|
|
* uint8_t: TRUE if data in buffer is being transmitted
|
|
* FALSE if all data in buffer has been transmitted by the UART
|
|
*
|
|
****************************************************************************/
|
|
uint8_t
|
|
uart_driver_tx_in_progress(uint8_t uart_dev)
|
|
{
|
|
|
|
if(u16AHI_UartReadTxFifoLevel(uart_dev) == 0) {
|
|
if((u8AHI_UartReadLineStatus(uart_dev) & E_AHI_UART_LS_TEMT) != 0) {
|
|
return FALSE;
|
|
}
|
|
}
|
|
return TRUE;
|
|
}
|
|
#ifdef UART_EXTRAS
|
|
|
|
/****************************************************************************
|
|
*
|
|
* NAME: uart_driver_flush
|
|
*
|
|
* DESCRIPTION:
|
|
* Flushes the buffers of the specified UART
|
|
*
|
|
* PARAMETERS: Name RW Usage
|
|
* uart_dev R UART to disable, eg, E_AHI_UART_0
|
|
* reset_tx R to reset the transmit FIFO
|
|
* reset_rx R to reset the receive FIFO
|
|
*
|
|
* RETURNS:
|
|
* void
|
|
*
|
|
****************************************************************************/
|
|
void
|
|
uart_driver_flush(uint8_t uart_dev, bool_t reset_tx, bool_t reset_rx)
|
|
{
|
|
/* Disable TX Fifo empty and Rx data interrupts */
|
|
uart_driver_disable_interrupts(uart_dev);
|
|
|
|
/* flush hardware buffer */
|
|
vAHI_UartReset(uart_dev, reset_tx, reset_rx);
|
|
vAHI_UartReset(uart_dev, FALSE, FALSE);
|
|
|
|
/* Re-enable TX Fifo empty and Rx data interrupts */
|
|
uart_driver_enable_interrupts(uart_dev);
|
|
}
|
|
#endif /* UART_EXTRAS */
|