b3ea790449
Add functions providing the last reset cause, one as an integer (ID), and one as a string. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
136 lines
4.4 KiB
C
136 lines
4.4 KiB
C
/*
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* Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-sys-ctrl
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* @{
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*
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* \file
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* Implementation of the cc2538 System Control driver
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*/
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#include "contiki.h"
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#include "reg.h"
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#include "cpu.h"
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#include "dev/sys-ctrl.h"
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#include "dev/gpio.h"
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#include "dev/ioc.h"
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#include <stdint.h>
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#if SYS_CTRL_OSC32K_USE_XTAL
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#define SYS_CTRL_OSCS 0
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#else
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#define SYS_CTRL_OSCS SYS_CTRL_CLOCK_CTRL_OSC32K
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#endif
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/*---------------------------------------------------------------------------*/
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int
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sys_ctrl_get_reset_cause(void)
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{
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return (REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_RST) >>
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SYS_CTRL_CLOCK_STA_RST_S;
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}
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/*---------------------------------------------------------------------------*/
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const char *
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sys_ctrl_get_reset_cause_str(void)
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{
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static const char *reset_cause[] = {
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"POR",
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"External reset",
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"WDT",
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"CLD or software reset"
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};
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return reset_cause[sys_ctrl_get_reset_cause()];
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}
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/*---------------------------------------------------------------------------*/
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void
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sys_ctrl_init()
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{
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uint32_t val;
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#if SYS_CTRL_OSC32K_USE_XTAL
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/* Set the XOSC32K_Q pads to analog for crystal */
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GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(6));
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GPIO_SET_INPUT(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(6));
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ioc_set_over(GPIO_D_NUM, 6, IOC_OVERRIDE_ANA);
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GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(7));
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GPIO_SET_INPUT(GPIO_PORT_TO_BASE(GPIO_D_NUM), GPIO_PIN_MASK(7));
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ioc_set_over(GPIO_D_NUM, 7, IOC_OVERRIDE_ANA);
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#endif
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/*
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* Desired Clock Ctrl configuration:
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* 32KHz source: RC or crystal, according to SYS_CTRL_OSC32K_USE_XTAL
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* System Clock: 32 MHz
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* Power Down Unused
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* I/O Div: according to SYS_CTRL_IO_DIV
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* Sys Div: according to SYS_CTRL_SYS_DIV
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* Rest: Don't care
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*/
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val = SYS_CTRL_OSCS | SYS_CTRL_CLOCK_CTRL_OSC_PD
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| SYS_CTRL_IO_DIV | SYS_CTRL_SYS_DIV;
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REG(SYS_CTRL_CLOCK_CTRL) = val;
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while((REG(SYS_CTRL_CLOCK_STA)
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& (SYS_CTRL_CLOCK_STA_OSC32K | SYS_CTRL_CLOCK_STA_OSC))
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!= SYS_CTRL_OSCS);
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#if SYS_CTRL_OSC32K_USE_XTAL
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/* Wait for the 32-kHz crystal oscillator to stabilize */
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while(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K);
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while(!(REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYNC_32K));
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#endif
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}
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/*---------------------------------------------------------------------------*/
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void
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sys_ctrl_reset()
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{
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REG(SYS_CTRL_PWRDBG) = SYS_CTRL_PWRDBG_FORCE_WARM_RESET;
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}
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/*---------------------------------------------------------------------------*/
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uint32_t
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sys_ctrl_get_sys_clock(void)
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{
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return SYS_CTRL_32MHZ >> (REG(SYS_CTRL_CLOCK_STA) &
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SYS_CTRL_CLOCK_STA_SYS_DIV);
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}
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/*---------------------------------------------------------------------------*/
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uint32_t
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sys_ctrl_get_io_clock(void)
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{
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return SYS_CTRL_32MHZ >> ((REG(SYS_CTRL_CLOCK_STA) &
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SYS_CTRL_CLOCK_STA_IO_DIV) >> 8);
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}
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/**
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* @}
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* @}
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*/
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