290 lines
10 KiB
C
290 lines
10 KiB
C
/*
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* Copyright (c) 2015, Zolertia
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup zoul
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* @{
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*
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* \defgroup zoul-cc1200 Zoul CC1200 arch
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*
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* CC1200 Zoul arch specifics
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* @{
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*
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* \file
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* CC1200 Zoul arch specifics
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*/
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "contiki-net.h"
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#include "dev/leds.h"
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#include "reg.h"
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#include "dev/spi-arch-legacy.h"
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#include "dev/ioc.h"
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#include "dev/sys-ctrl.h"
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#include "dev/spi-legacy.h"
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#include "dev/ssi.h"
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#include "dev/gpio.h"
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#include "dev/gpio-hal.h"
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#include <stdio.h>
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/*---------------------------------------------------------------------------*/
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#define CC1200_SPI_CLK_PORT_BASE GPIO_PORT_TO_BASE(SPI0_CLK_PORT)
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#define CC1200_SPI_CLK_PIN_MASK GPIO_PIN_MASK(SPI0_CLK_PIN)
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#define CC1200_SPI_MOSI_PORT_BASE GPIO_PORT_TO_BASE(SPI0_TX_PORT)
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#define CC1200_SPI_MOSI_PIN_MASK GPIO_PIN_MASK(SPI0_TX_PIN)
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#define CC1200_SPI_MISO_PORT_BASE GPIO_PORT_TO_BASE(SPI0_RX_PORT)
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#define CC1200_SPI_MISO_PIN_MASK GPIO_PIN_MASK(SPI0_RX_PIN)
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#define CC1200_SPI_CSN_PORT_BASE GPIO_PORT_TO_BASE(CC1200_SPI_CSN_PORT)
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#define CC1200_SPI_CSN_PIN_MASK GPIO_PIN_MASK(CC1200_SPI_CSN_PIN)
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#define CC1200_GDO0_PORT_BASE GPIO_PORT_TO_BASE(CC1200_GDO0_PORT)
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#define CC1200_GDO0_PIN_MASK GPIO_PIN_MASK(CC1200_GDO0_PIN)
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#define CC1200_GDO2_PORT_BASE GPIO_PORT_TO_BASE(CC1200_GDO2_PORT)
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#define CC1200_GDO2_PIN_MASK GPIO_PIN_MASK(CC1200_GDO2_PIN)
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#define CC1200_RESET_PORT_BASE GPIO_PORT_TO_BASE(CC1200_RESET_PORT)
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#define CC1200_RESET_PIN_MASK GPIO_PIN_MASK(CC1200_RESET_PIN)
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/*---------------------------------------------------------------------------*/
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#ifndef DEBUG_CC1200_ARCH
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#define DEBUG_CC1200_ARCH 0
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#endif
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/*---------------------------------------------------------------------------*/
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#if DEBUG_CC1200_ARCH > 0
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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/*---------------------------------------------------------------------------*/
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extern int cc1200_rx_interrupt(void);
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/*---------------------------------------------------------------------------*/
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void
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cc1200_int_handler(gpio_hal_pin_mask_t pin_mask)
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{
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/* To keep the gpio_register_callback happy */
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cc1200_rx_interrupt();
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_spi_select(void)
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{
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/* Set CSn to low (0) */
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GPIO_CLR_PIN(CC1200_SPI_CSN_PORT_BASE, CC1200_SPI_CSN_PIN_MASK);
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/* The MISO pin should go low before chip is fully enabled. */
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RTIMER_BUSYWAIT_UNTIL(
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GPIO_READ_PIN(CC1200_SPI_MISO_PORT_BASE, CC1200_SPI_MISO_PIN_MASK) == 0,
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RTIMER_SECOND / 100);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_spi_deselect(void)
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{
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/* Set CSn to high (1) */
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GPIO_SET_PIN(CC1200_SPI_CSN_PORT_BASE, CC1200_SPI_CSN_PIN_MASK);
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}
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/*---------------------------------------------------------------------------*/
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int
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cc1200_arch_spi_rw_byte(uint8_t c)
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{
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SPI_WAITFORTx_BEFORE();
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SPIX_BUF(CC1200_SPI_INSTANCE) = c;
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SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
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SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
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c = SPIX_BUF(CC1200_SPI_INSTANCE);
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return c;
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}
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/*---------------------------------------------------------------------------*/
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int
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cc1200_arch_spi_rw(uint8_t *inbuf, const uint8_t *write_buf, uint16_t len)
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{
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int i;
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uint8_t c;
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if((inbuf == NULL && write_buf == NULL) || len <= 0) {
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return 1;
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} else if(inbuf == NULL) {
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for(i = 0; i < len; i++) {
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SPI_WAITFORTx_BEFORE();
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SPIX_BUF(CC1200_SPI_INSTANCE) = write_buf[i];
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SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
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SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
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c = SPIX_BUF(CC1200_SPI_INSTANCE);
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/* read and discard to avoid "variable set but not used" warning */
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(void)c;
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}
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} else if(write_buf == NULL) {
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for(i = 0; i < len; i++) {
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SPI_WAITFORTx_BEFORE();
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SPIX_BUF(CC1200_SPI_INSTANCE) = 0;
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SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
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SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
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inbuf[i] = SPIX_BUF(CC1200_SPI_INSTANCE);
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}
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} else {
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for(i = 0; i < len; i++) {
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SPI_WAITFORTx_BEFORE();
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SPIX_BUF(CC1200_SPI_INSTANCE) = write_buf[i];
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SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
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SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
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inbuf[i] = SPIX_BUF(CC1200_SPI_INSTANCE);
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}
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}
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return 0;
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}
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/*---------------------------------------------------------------------------*/
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static gpio_hal_event_handler_t interrupt_handler = {
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.next = NULL,
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.handler = cc1200_int_handler,
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.pin_mask =
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(gpio_hal_pin_to_mask(CC1200_GDO0_PIN) << (CC1200_GDO0_PORT << 3)) |
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(gpio_hal_pin_to_mask(CC1200_GDO2_PIN) << (CC1200_GDO2_PORT << 3))
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};
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio0_setup_irq(int rising)
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{
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GPIO_SOFTWARE_CONTROL(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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GPIO_SET_INPUT(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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GPIO_DETECT_EDGE(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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GPIO_TRIGGER_SINGLE_EDGE(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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if(rising) {
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GPIO_DETECT_RISING(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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} else {
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GPIO_DETECT_FALLING(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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}
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GPIO_ENABLE_INTERRUPT(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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ioc_set_over(CC1200_GDO0_PORT, CC1200_GDO0_PIN, IOC_OVERRIDE_PUE);
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NVIC_EnableIRQ(CC1200_GPIOx_VECTOR);
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gpio_hal_register_handler(&interrupt_handler);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio2_setup_irq(int rising)
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{
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GPIO_SOFTWARE_CONTROL(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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GPIO_SET_INPUT(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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GPIO_DETECT_EDGE(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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GPIO_TRIGGER_SINGLE_EDGE(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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if(rising) {
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GPIO_DETECT_RISING(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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} else {
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GPIO_DETECT_FALLING(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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}
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GPIO_ENABLE_INTERRUPT(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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ioc_set_over(CC1200_GDO2_PORT, CC1200_GDO2_PIN, IOC_OVERRIDE_PUE);
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NVIC_EnableIRQ(CC1200_GPIOx_VECTOR);
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gpio_hal_register_handler(&interrupt_handler);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio0_enable_irq(void)
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{
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GPIO_ENABLE_INTERRUPT(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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ioc_set_over(CC1200_GDO0_PORT, CC1200_GDO0_PIN, IOC_OVERRIDE_PUE);
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NVIC_EnableIRQ(CC1200_GPIOx_VECTOR);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio0_disable_irq(void)
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{
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GPIO_DISABLE_INTERRUPT(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio2_enable_irq(void)
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{
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GPIO_ENABLE_INTERRUPT(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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ioc_set_over(CC1200_GDO2_PORT, CC1200_GDO2_PIN, IOC_OVERRIDE_PUE);
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NVIC_EnableIRQ(CC1200_GPIOx_VECTOR);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_gpio2_disable_irq(void)
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{
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GPIO_DISABLE_INTERRUPT(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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}
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/*---------------------------------------------------------------------------*/
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int
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cc1200_arch_gpio0_read_pin(void)
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{
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return (GPIO_READ_PIN(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK) ? 1 : 0);
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}
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/*---------------------------------------------------------------------------*/
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int
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cc1200_arch_gpio2_read_pin(void)
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{
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return GPIO_READ_PIN(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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}
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/*---------------------------------------------------------------------------*/
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int
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cc1200_arch_gpio3_read_pin(void)
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{
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return 0x00;
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}
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/*---------------------------------------------------------------------------*/
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void
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cc1200_arch_init(void)
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{
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/* First leave RESET high */
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GPIO_SOFTWARE_CONTROL(CC1200_RESET_PORT_BASE, CC1200_RESET_PIN_MASK);
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GPIO_SET_OUTPUT(CC1200_RESET_PORT_BASE, CC1200_RESET_PIN_MASK);
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ioc_set_over(CC1200_RESET_PORT, CC1200_RESET_PIN, IOC_OVERRIDE_OE);
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GPIO_SET_PIN(CC1200_RESET_PORT_BASE, CC1200_RESET_PIN_MASK);
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/* Initialize CSn, enable CSn and then wait for MISO to go low*/
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spix_cs_init(CC1200_SPI_CSN_PORT, CC1200_SPI_CSN_PIN);
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/* Initialize SPI */
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spix_init(CC1200_SPI_INSTANCE);
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/* Configure GPIOx */
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GPIO_SOFTWARE_CONTROL(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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GPIO_SET_INPUT(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
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GPIO_SOFTWARE_CONTROL(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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GPIO_SET_INPUT(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
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/* Leave CSn as default */
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cc1200_arch_spi_deselect();
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/* Ensure MISO is high */
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RTIMER_BUSYWAIT_UNTIL(
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GPIO_READ_PIN(CC1200_SPI_MISO_PORT_BASE, CC1200_SPI_MISO_PIN_MASK),
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RTIMER_SECOND / 10);
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}
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/*---------------------------------------------------------------------------*/
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/**
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* @}
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* @}
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*/
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