305 lines
9.8 KiB
C
305 lines
9.8 KiB
C
/*
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* Copyright (c) 2015, SICS Swedish ICT.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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#ifndef JN516X_DEF_H_
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#define JN516X_DEF_H_
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#include <inttypes.h>
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#include <jendefs.h>
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#undef putchar
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/* 1 len byte, 2 bytes CRC */
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#define RADIO_PHY_OVERHEAD 3
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/* 250kbps data rate. One byte = 32us */
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#define RADIO_BYTE_AIR_TIME 32
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/* Delay between GO signal and SFD
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* Measured 153us between GO and preamble. Add 5 bytes (preamble + SFD) air time: 153+5*32 = 313 */
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#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(313))
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/* Delay between GO signal and start listening
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* Measured 104us: between GO signal and start listening */
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#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(104))
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/* Delay between the SFD finishes arriving and it is detected in software */
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#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(14))
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/* uIP endinanness */
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#define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN
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/* Micromac configuration */
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#ifndef MIRCOMAC_CONF_BUF_NUM
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#define MIRCOMAC_CONF_BUF_NUM 2
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#endif
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/* 32kHz or 16MHz rtimers? */
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#ifdef RTIMER_CONF_USE_32KHZ
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#define RTIMER_USE_32KHZ RTIMER_CONF_USE_32KHZ
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#else
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#define RTIMER_USE_32KHZ 0
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#endif
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/* Put the device in a sleep mode in idle periods?
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* If RTIMER_USE_32KHZ is set, the device runs all the time on the 32 kHz oscillator.
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* If RTIMER_USE_32KHZ is not set, the device runs on the 32 kHz oscillator during sleep,
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* and switches back to the 32 MHz oscillator (16 MHz rtimer) at wakeup.
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* */
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#ifdef JN516X_SLEEP_CONF_ENABLED
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#define JN516X_SLEEP_ENABLED JN516X_SLEEP_CONF_ENABLED
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#else
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#define JN516X_SLEEP_ENABLED 0
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#endif
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/* Enable this to get the 32.768kHz oscillator */
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#ifndef JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
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#define JN516X_EXTERNAL_CRYSTAL_OSCILLATOR (RTIMER_USE_32KHZ || JN516X_SLEEP_ENABLED)
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#endif /* JN516X_EXTERNAL_CRYSTAL_OSCILLATOR */
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/* 8ms timer tick */
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#define CLOCK_CONF_SECOND 125
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#if JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
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#define JN516X_XOSC_SECOND 32768
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#else
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#define JN516X_XOSC_SECOND 32000
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#endif
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/* Timer conversion*/
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#if RTIMER_USE_32KHZ
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#define RADIO_TO_RTIMER(X) ((X) * (JN516X_XOSC_SECOND) / 62500)
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#else
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/* RTIMER 16M = 256 * 62500(RADIO) == 2^8 * 62500 */
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#define RADIO_TO_RTIMER(X) ((rtimer_clock_t)((X) << (int32_t)8L))
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#endif
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/* If the timer base a binary 32kHz clock, compensate for this base drift */
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#if RTIMER_USE_32KHZ && JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
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/* The drift compared to "true" 10ms slots.
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* Enable adaptive sync to enable compensation for this.
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* Slot length 10000 usec
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* 328 ticks
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* Tick duration 30.517578125 usec
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* Real slot duration 10009.765625 usec
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* Target - real duration = -9.765625 usec
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* TSCH_CONF_BASE_DRIFT_PPM -977
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*/
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#define TSCH_CONF_BASE_DRIFT_PPM -977
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#endif
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#define DR_11744_DIO2 12
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#define DR_11744_DIO3 13
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#define DR_11744_DIO4 14
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#define DR_11744_DIO5 15
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#define DR_11744_DIO6 16
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#define DR_11744_DIO7 17
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/* Enable power amplifier of JN5168 M05 and M06 modules */
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#if defined(JN5168_M05) || defined(JN5168_M06)
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#define RADIO_TEST_MODE RADIO_TEST_MODE_HIGH_PWR
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#else
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#define RADIO_TEST_MODE RADIO_TEST_MODE_DISABLED
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#endif
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#define TSCH_DEBUG 0
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#if TSCH_DEBUG
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#define TSCH_DEBUG_INIT() do { \
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vAHI_DioSetDirection(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); \
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vAHI_DioSetOutput(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); } while(0);
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#define TSCH_DEBUG_INTERRUPT() do { \
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static dio_state = 0; \
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dio_state = !dio_state; \
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if(dio_state) { \
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vAHI_DioSetOutput((1 << DR_11744_DIO2), 0); \
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} else { \
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vAHI_DioSetOutput(0, (1 << DR_11744_DIO2)); \
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} \
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} while(0);
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#define TSCH_DEBUG_RX_EVENT() do { \
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static dio_state = 0; \
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dio_state = !dio_state; \
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if(dio_state) { \
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vAHI_DioSetOutput((1 << DR_11744_DIO4), 0); \
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} else { \
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vAHI_DioSetOutput(0, (1 << DR_11744_DIO4)); \
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} \
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} while(0);
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#define TSCH_DEBUG_TX_EVENT() do { \
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static dio_state = 0; \
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dio_state = !dio_state; \
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if(dio_state) { \
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vAHI_DioSetOutput((1 << DR_11744_DIO5), 0); \
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} else { \
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vAHI_DioSetOutput(0, (1 << DR_11744_DIO5)); \
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} \
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} while(0);
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#define TSCH_DEBUG_SLOT_START() do { \
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static dio_state = 0; \
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dio_state = !dio_state; \
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if(dio_state) { \
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vAHI_DioSetOutput((1 << DR_11744_DIO3), 0); \
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} else { \
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vAHI_DioSetOutput(0, (1 << DR_11744_DIO3)); \
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} \
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} while(0);
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#define TSCH_DEBUG_SLOT_END()
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#endif /* TSCH_DEBUG */
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/* UART baud rates */
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#define UART_RATE_4800 0
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#define UART_RATE_9600 1
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#define UART_RATE_19200 2
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#define UART_RATE_38400 3
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#define UART_RATE_76800 4
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#define UART_RATE_115200 5
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#define UART_RATE_230400 6
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#define UART_RATE_460800 7
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#define UART_RATE_500000 8
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#define UART_RATE_576000 9
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#define UART_RATE_921600 10
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#define UART_RATE_1000000 11
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#define PLATFORM_HAS_LEDS 1
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#define PLATFORM_HAS_BUTTON (SENSOR_BOARD_DR1174 == 1)
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#define PLATFORM_HAS_LIGHT (SENSOR_BOARD_DR1175 == 1)
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#define PLATFORM_HAS_HT (SENSOR_BOARD_DR1175 == 1)
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#define PLATFORM_HAS_POT (SENSOR_BOARD_DR1199 == 1)
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#define PLATFORM_HAS_BATTERY 0 /* sensor driver not implemented */
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#define PLATFORM_HAS_SHT11 0
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#define PLATFORM_HAS_RADIO 1
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#define LEDS_CONF_LEGACY_API 1
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#define PLATFORM_CONF_PROVIDES_MAIN_LOOP 1
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/* CPU target speed in Hz
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* RTIMER and peripherals clock is F_CPU/2 */
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#define F_CPU 32000000UL
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/* LED ports */
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/*
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#define LEDS_PxDIR P5DIR
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#define LEDS_PxOUT P5OUT
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#define LEDS_CONF_RED 0x10
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#define LEDS_CONF_GREEN 0x20
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#define LEDS_CONF_YELLOW 0x40
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#define JENNIC_CONF_BUTTON_PIN (IRQ_DIO9|IRQ_DIO10)
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*/
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#define CC_CONF_REGISTER_ARGS 1
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#define CC_CONF_FUNCTION_POINTER_ARGS 1
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#define CC_CONF_VA_ARGS 1
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#define CC_CONF_INLINE inline
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#ifdef HAVE_STDINT_H
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#include <stdint.h>
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#else
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#ifndef uint8_t
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typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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typedef unsigned long uint32_t;
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typedef signed char int8_t;
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typedef short int16_t;
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typedef long int32_t;
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typedef unsigned long long uint64_t;
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typedef long long int64_t;
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#endif
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#endif /* !HAVE_STDINT_H */
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/* Types for clocks and uip_stats */
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typedef uint16_t uip_stats_t;
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typedef uint32_t clock_time_t;
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/* Shall we calibrate the DCO periodically? */
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#ifndef DCOSYNCH_CONF_ENABLED
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#define DCOSYNCH_CONF_ENABLED (!(MAC_CONF_WITH_TSCH))
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#endif /* DCOSYNCH_CONF_ENABLED */
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/* How often shall we attempt to calibrate DCO?
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* PS: It should be calibrated upon temperature changes,
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* but the naive approach of periodic calibration is fine too */
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#ifndef DCOSYNCH_PERIOD
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#define DCOSYNCH_PERIOD (5 * 60)
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#endif /* VCO_CALIBRATION_INTERVAL */
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/* Disable UART HW flow control */
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#ifndef UART_HW_FLOW_CTRL
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#define UART_HW_FLOW_CTRL 0
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#endif /* UART_HW_FLOW_CTRL */
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/* Disable UART SW flow control */
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#ifndef UART_XONXOFF_FLOW_CTRL
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#define UART_XONXOFF_FLOW_CTRL 1
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#endif /* UART_XONXOFF_FLOW_CTRL */
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#ifndef UART_BAUD_RATE
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#define UART_BAUD_RATE UART_RATE_1000000
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#endif /* UART_BAUD_RATE */
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#ifndef UART1_BAUD_RATE
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#define UART1_BAUD_RATE UART_RATE_1000000
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#endif
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#define ENABLE_ADVANCED_BAUD_SELECTION (UART_BAUD_RATE > UART_RATE_115200)
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/* Extension of LED definitions from leds.h for various JN516x dev boards
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JN516x Dongle:
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LEDS_RED Red LED on dongle
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LEDS_GREEN Green LED on dongle
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Note: Only one LED can be switch on at the same time
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DR1174-only:
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LEDS_GP0 LED D3 on DR1174
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LEDS_GP1 LED D6 on DR1174
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DR1174+DR1199:
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LEDS_RED LED D1 on DR1199
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LEDS_GREEN LED D2 on DR1199
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LEDS_BLUE LED D3 on DR1199
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LEDS_GP0 LED D3 on DR1174
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LEDS_GP1 LED D6 on DR1174
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DR1174+DR1175:
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LEDS_RED Red led in RGB-led with level control on DR1175
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LEDS_GREEN Green led in RGB-led with level control on DR1175
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LEDS_BLUE Blue led in RGB-led with level control on DR1175
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LEDS_WHITE White power led with level control on DR1175
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LEDS_GP0 LEDS D3 on DR1174
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LEDS_GP1 LEDS D6 on DR1174
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*/
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#define LEDS_WHITE 8
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#define LEDS_GP0 16
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#define LEDS_GP1 32
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#define LEDS_GP2 64
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#define LEDS_GP3 128
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#define LEDS_CONF_ALL 255
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#endif /* JN516X_DEF_H_ */
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