109 lines
3.9 KiB
C
109 lines
3.9 KiB
C
/*
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* Copyright (c) 2016, Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538-soc
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* @{
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*
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* \file
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* Implementation of the cc2538 SoC driver
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*/
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#include "contiki-conf.h"
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#include "dev/rom-util.h"
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#include "dev/sys-ctrl.h"
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#include "reg.h"
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#include "soc.h"
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#include <stdint.h>
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#include <stdio.h>
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/*----------------------------------------------------------------------------*/
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#define DIECFG0 0x400d3014
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#define DIECFG0_SRAM_SIZE_OFS 7
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#define DIECFG0_SRAM_SIZE_SZ 3
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#define DIECFG0_SRAM_SIZE_MSK (((1 << DIECFG0_SRAM_SIZE_SZ) - 1) << \
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DIECFG0_SRAM_SIZE_OFS)
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#define DIECFG2 0x400d301c
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#define DIECFG2_DIE_REV_OFS 8
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#define DIECFG2_DIE_REV_SZ 8
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#define DIECFG2_DIE_REV_MSK (((1 << DIECFG2_DIE_REV_SZ) - 1) << \
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DIECFG2_DIE_REV_OFS)
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#define DIECFG2_AES_EN 0x00000002
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#define DIECFG2_PKA_EN 0x00000001
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/*----------------------------------------------------------------------------*/
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uint8_t
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soc_get_rev(void)
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{
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uint8_t rev = (REG(DIECFG2) & DIECFG2_DIE_REV_MSK) >> DIECFG2_DIE_REV_OFS;
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/* PG1.0 is encoded as 0x00. */
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if(!(rev >> 4))
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rev += 0x10;
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return rev;
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}
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/*----------------------------------------------------------------------------*/
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uint32_t
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soc_get_sram_size(void)
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{
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uint32_t size_code = (REG(DIECFG0) & DIECFG0_SRAM_SIZE_MSK) >>
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DIECFG0_SRAM_SIZE_OFS;
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return size_code <= 1 ? (2 - size_code) << 13 : 32 << 10;
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}
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/*----------------------------------------------------------------------------*/
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uint32_t
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soc_get_features(void)
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{
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return REG(DIECFG2) & (DIECFG2_AES_EN | DIECFG2_PKA_EN);
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}
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/*----------------------------------------------------------------------------*/
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void
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soc_print_info(void)
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{
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uint8_t rev = soc_get_rev();
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uint32_t features = soc_get_features();
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printf("CC2538: ID: 0x%04lx, rev.: PG%d.%d, Flash: %lu KiB, SRAM: %lu KiB, "
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"AES/SHA: %u, ECC/RSA: %u\n"
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"System clock: %lu Hz\n"
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"I/O clock: %lu Hz\n"
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"Reset cause: %s\n",
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rom_util_get_chip_id(),
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rev >> 4, rev & 0x0f,
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rom_util_get_flash_size() >> 10,
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soc_get_sram_size() >> 10,
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!!(features & SOC_FEATURE_AES_SHA),
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!!(features & SOC_FEATURE_ECC_RSA),
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sys_ctrl_get_sys_clock(),
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sys_ctrl_get_io_clock(),
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sys_ctrl_get_reset_cause_str());
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}
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/** @} */
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