279 lines
12 KiB
C
279 lines
12 KiB
C
/*
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* Copyright (c) 2018, Texas Instruments Incorporated - http://www.ti.com/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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// Parameter summary
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// Address: 0
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// Address0: 0xAA
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// Address1: 0xBB
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// Frequency: 868.00000 MHz
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// Data Format: Serial mode disable
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// Deviation: 25.000 kHz
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// pktLen: 30
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// 802.15.4g Mode: 0
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// Select bit order to transmit PSDU octets:: 1
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// Packet Length Config: Variable
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// Max Packet Length: 255
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// Packet Length: 0
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// Packet Data: 255
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// RX Filter BW: 98 kHz
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// Symbol Rate: 50.00000 kBaud
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// Sync Word Length: 24 Bits
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// TX Power: 14 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
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// Whitening: Dynamically IEEE 802.15.4g compatible whitener and 16/32-bit CRC
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/*---------------------------------------------------------------------------*/
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#include "sys/cc.h"
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/*---------------------------------------------------------------------------*/
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#include <ti/devices/DeviceFamily.h>
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#include DeviceFamily_constructPath(driverlib/rf_mailbox.h)
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#include DeviceFamily_constructPath(driverlib/rf_common_cmd.h)
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#include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h)
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#include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_genfsk.h)
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#include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genfsk.h)
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#include <ti/drivers/rf/RF.h>
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/*---------------------------------------------------------------------------*/
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#include "prop-settings.h"
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/*---------------------------------------------------------------------------*/
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// TI-RTOS RF Mode Object
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RF_Mode rf_prop_mode =
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{
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.rfMode = RF_MODE_PROPRIETARY_SUB_1,
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.cpePatchFxn = &rf_patch_cpe_genfsk,
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.mcePatchFxn = 0,
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.rfePatchFxn = &rf_patch_rfe_genfsk,
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};
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/*---------------------------------------------------------------------------*/
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// TX Power table
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// The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments:
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// RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient)
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// See the Technical Reference Manual for further details about the "txPower" Command field.
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// The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise.
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RF_TxPowerTable_Entry rf_prop_tx_power_table[RF_PROP_TX_POWER_TABLE_SIZE+1] =
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{
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{ -10, RF_TxPowerTable_DEFAULT_PA_ENTRY( 0, 3, 0, 2) },
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{ 0, RF_TxPowerTable_DEFAULT_PA_ENTRY( 3, 3, 0, 9) },
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{ 1, RF_TxPowerTable_DEFAULT_PA_ENTRY( 4, 3, 0, 11) },
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{ 2, RF_TxPowerTable_DEFAULT_PA_ENTRY( 5, 3, 0, 12) },
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{ 3, RF_TxPowerTable_DEFAULT_PA_ENTRY( 6, 3, 0, 14) },
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{ 4, RF_TxPowerTable_DEFAULT_PA_ENTRY( 4, 1, 0, 12) },
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{ 5, RF_TxPowerTable_DEFAULT_PA_ENTRY( 8, 3, 0, 16) },
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{ 6, RF_TxPowerTable_DEFAULT_PA_ENTRY( 9, 3, 0, 18) },
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{ 7, RF_TxPowerTable_DEFAULT_PA_ENTRY(11, 3, 0, 21) },
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{ 8, RF_TxPowerTable_DEFAULT_PA_ENTRY(14, 3, 0, 25) },
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{ 9, RF_TxPowerTable_DEFAULT_PA_ENTRY(18, 3, 0, 32) },
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{ 10, RF_TxPowerTable_DEFAULT_PA_ENTRY(24, 3, 0, 44) },
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{ 11, RF_TxPowerTable_DEFAULT_PA_ENTRY(37, 3, 0, 72) },
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{ 12, RF_TxPowerTable_DEFAULT_PA_ENTRY(43, 0, 0, 94) },
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// This setting requires CCFG_FORCE_VDDR_HH = 1.
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{ 14, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 1, 85) },
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RF_TxPowerTable_TERMINATION_ENTRY
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};
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/*---------------------------------------------------------------------------*/
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// Overrides for CMD_PROP_RADIO_DIV_SETUP
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uint32_t rf_prop_overrides[] CC_ALIGN(4) =
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{
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// override_use_patch_prop_genfsk.xml
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MCE_RFE_OVERRIDE(0,4,0,1,0,0), // PHY: Use MCE ROM bank 4, RFE RAM patch
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// override_synth_prop_863_930_div5.xml
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HW_REG_OVERRIDE(0x4038,0x0037), // Synth: Set recommended RTRIM to 7
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(uint32_t)0x000684A3, // Synth: Set Fref to 4 MHz
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HW_REG_OVERRIDE(0x4020,0x7F00), // Synth: Configure fine calibration setting
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HW_REG_OVERRIDE(0x4064,0x0040), // Synth: Configure fine calibration setting
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(uint32_t)0xB1070503, // Synth: Configure fine calibration setting
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(uint32_t)0x05330523, // Synth: Configure fine calibration setting
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(uint32_t)0x0A480583, // Synth: Set loop bandwidth after lock to 20 kHz
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(uint32_t)0x7AB80603, // Synth: Set loop bandwidth after lock to 20 kHz
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ADI_REG_OVERRIDE(1,4,0x9F), // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
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ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
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(uint32_t)0x02010403, // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
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(uint32_t)0x00108463, // Synth: Configure extra PLL filtering
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(uint32_t)0x04B00243, // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
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// override_phy_rx_aaf_bw_0xd.xml
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ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
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// override_phy_gfsk_rx.xml
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(uint32_t)0x00038883, // Rx: Set LNA bias current trim offset to 3
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HW_REG_OVERRIDE(0x6084,0x35F1), // Rx: Freeze RSSI on sync found event
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// override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml
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HW_REG_OVERRIDE(0x6088,0x411A), // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x1A.
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HW_REG_OVERRIDE(0x608C,0x8213), // Tx: Configure PA ramping setting
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// override_crc_ieee_802_15_4.xml
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(uint32_t)0x00000943, // IEEE 802.15.4g: Fix incorrect initialization value for CRC-16 calculation (see TRM section 23.7.5.2.1)
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(uint32_t)0x00000963, // IEEE 802.15.4g: Fix incorrect initialization value for CRC-16 calculation (see TRM section 23.7.5.2.1)
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// override_phy_rx_rssi_offset_5db.xml
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(uint32_t)0x00FB88A3, // Rx: Set RSSI offset to adjust reported RSSI by +5 dB
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// TX power override
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ADI_REG_OVERRIDE(0,12,0xF8), // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
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(uint32_t)0xFFFFFFFF,
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};
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/*---------------------------------------------------------------------------*/
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// CMD_PROP_RADIO_DIV_SETUP
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// Proprietary Mode Radio Setup Command for All Frequency Bands
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rfc_CMD_PROP_RADIO_DIV_SETUP_t rf_cmd_prop_radio_div_setup =
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{
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.commandNo = CMD_PROP_RADIO_DIV_SETUP,
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.status = IDLE,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = COND_NEVER,
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.condition.nSkip = 0x0,
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.modulation.modType = 0x1,
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.modulation.deviation = 0x64,
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.symbolRate.preScale = 0xF,
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.symbolRate.rateWord = 0x8000,
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.rxBw = 0x52,
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.preamConf.nPreamBytes = 0x3,
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.preamConf.preamMode = 0x0,
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.formatConf.nSwBits = 0x18,
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.formatConf.bBitReversal = 0x0,
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.formatConf.bMsbFirst = 0x1,
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.formatConf.fecMode = 0x0,
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.formatConf.whitenMode = 0x7,
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.config.frontEndMode = 0x0,
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.config.biasMode = 0x1,
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.config.analogCfgMode = 0x0,
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.config.bNoFsPowerUp = 0x0,
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.txPower = 0xAB3F,
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.pRegOverride = rf_prop_overrides,
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.centerFreq = 0x0364,
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.intFreq = 0x8000,
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.loDivider = 0x05,
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};
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/*---------------------------------------------------------------------------*/
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// CMD_FS
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// Frequency Synthesizer Programming Command
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rfc_CMD_FS_t rf_cmd_prop_fs =
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{
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.commandNo = CMD_FS,
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.status = IDLE,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x0,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = COND_NEVER,
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.condition.nSkip = 0x0,
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.frequency = 0x0364,
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.fractFreq = 0x0000,
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.synthConf.bTxMode = 0x0,
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.synthConf.refFreq = 0x0,
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.__dummy0 = 0x00,
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.__dummy1 = 0x00,
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.__dummy2 = 0x00,
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.__dummy3 = 0x0000,
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};
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/*---------------------------------------------------------------------------*/
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// CMD_PROP_TX_ADV
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// Proprietary Mode Advanced Transmit Command
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rfc_CMD_PROP_TX_ADV_t rf_cmd_prop_tx_adv =
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{
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.commandNo = CMD_PROP_TX_ADV,
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.status = IDLE,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = 0x2,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x1,
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.condition.rule = COND_NEVER,
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.condition.nSkip = 0x0,
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.pktConf.bFsOff = 0x0,
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.pktConf.bUseCrc = 0x1,
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.pktConf.bCrcIncSw = 0x0,
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.pktConf.bCrcIncHdr = 0x0,
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.numHdrBits = 0x10,
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.pktLen = 0x0000,
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.startConf.bExtTxTrig = 0x0,
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.startConf.inputMode = 0x0,
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.startConf.source = 0x0,
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.preTrigger.triggerType = TRIG_REL_START,
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.preTrigger.bEnaCmd = 0x0,
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.preTrigger.triggerNo = 0x0,
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.preTrigger.pastTrig = 0x1,
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.preTime = 0x00000000,
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.syncWord = 0x0055904E,
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.pPkt = 0, /* set by driver */
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};
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/*---------------------------------------------------------------------------*/
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// CMD_PROP_RX_ADV
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// Proprietary Mode Advanced Receive Command
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rfc_CMD_PROP_RX_ADV_t rf_cmd_prop_rx_adv =
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{
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.commandNo = CMD_PROP_RX_ADV,
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.status = IDLE,
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.pNextOp = 0,
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.startTime = 0x00000000,
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.startTrigger.triggerType = TRIG_NOW,
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.startTrigger.bEnaCmd = 0x0,
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.startTrigger.triggerNo = 0x0,
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.startTrigger.pastTrig = 0x0,
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.condition.rule = COND_NEVER,
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.condition.nSkip = 0x0,
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.pktConf.bFsOff = 0x0,
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.pktConf.bRepeatOk = 0x1,
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.pktConf.bRepeatNok = 0x1,
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.pktConf.bUseCrc = 0x1,
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.pktConf.bCrcIncSw = 0x0,
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.pktConf.bCrcIncHdr = 0x0,
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.pktConf.endType = 0x0,
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.pktConf.filterOp = 0x1,
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.rxConf.bAutoFlushIgnored = 0x1,
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.rxConf.bAutoFlushCrcErr = 0x1,
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.rxConf.bIncludeHdr = 0x0,
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.rxConf.bIncludeCrc = 0x0,
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.rxConf.bAppendRssi = 0x1,
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.rxConf.bAppendTimestamp = 0x0,
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.rxConf.bAppendStatus = 0x1,
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.syncWord0 = 0x0055904E,
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.syncWord1 = 0x00000000,
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.maxPktLen = 0x0, /* set by driver */
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.hdrConf.numHdrBits = 0x10,
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.hdrConf.lenPos = 0x0,
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.hdrConf.numLenBits = 0x0B,
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.addrConf.addrType = 0x0,
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.addrConf.addrSize = 0x0,
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.addrConf.addrPos = 0x0,
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.addrConf.numAddr = 0x0,
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.lenOffset = 0xFC,
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.endTrigger.triggerType = TRIG_NEVER,
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.endTrigger.bEnaCmd = 0x0,
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.endTrigger.triggerNo = 0x0,
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.endTrigger.pastTrig = 0x0,
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.endTime = 0x00000000,
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.pAddr = 0, /* set by driver */
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.pQueue = 0, /* set by driver */
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.pOutput = 0, /* set by driver */
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};
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/*---------------------------------------------------------------------------*/
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