351 lines
12 KiB
C
351 lines
12 KiB
C
/*
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* Copyright (c) 2016-2017, Yanzi Networks.
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* Copyright (c) 2017, University of Bristol - http://www.bristol.ac.uk/
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup dev
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* @{
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*
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* \defgroup spi-hal SPI Hardware Abstraction Layer
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*
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* The SPI HAL provides a set of common functions that can be used in a
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* platform-independent fashion.
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*
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*
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* @{
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*
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* \file
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* Header file for the SPI HAL
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef SPI_H_
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#define SPI_H_
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "gpio-hal.h"
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#include <stdint.h>
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#include <stdbool.h>
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/*---------------------------------------------------------------------------*/
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/* Include Arch-Specific conf */
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#ifdef SPI_HAL_CONF_ARCH_HDR_PATH
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#include SPI_HAL_CONF_ARCH_HDR_PATH
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#endif /* SPI_HAL_CONF_ARCH_HDR_PATH */
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/*---------------------------------------------------------------------------*/
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#ifdef SPI_CONF_CONTROLLER_COUNT
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/**
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* \brief Number of SPI module instances on a chip
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*/
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#define SPI_CONTROLLER_COUNT SPI_CONF_CONTROLLER_COUNT
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#else
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#define SPI_CONTROLLER_COUNT 0
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#endif
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/*---------------------------------------------------------------------------*/
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/* Convenience macros to enumerate SPI module instances on a chip */
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#define SPI_CONTROLLER_SPI0 0
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#define SPI_CONTROLLER_SPI1 1
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/*---------------------------------------------------------------------------*/
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/**
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* \brief SPI return codes
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*
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* @{
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*/
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typedef enum {
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SPI_DEV_STATUS_OK, /* Everything OK */
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SPI_DEV_STATUS_EINVAL, /* Erroneous input value */
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SPI_DEV_STATUS_TRANSFER_ERR, /* Error during SPI transfer */
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SPI_DEV_STATUS_BUS_LOCKED, /* SPI bus is already locked */
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SPI_DEV_STATUS_BUS_NOT_OWNED, /* SPI bus is locked by someone else */
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SPI_DEV_STATUS_CLOSED /* SPI bus has not opened properly */
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} spi_status_t;
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \brief SPI Device Configuration
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*
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* This is a structure to an architecture-independent SPI configuration.
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*
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* @{
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*/
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typedef struct spi_device {
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gpio_hal_pin_t pin_spi_sck; /* SPI SCK pin */
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gpio_hal_pin_t pin_spi_miso; /* SPI MISO pin */
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gpio_hal_pin_t pin_spi_mosi; /* SPI MOSI pin */
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gpio_hal_pin_t pin_spi_cs; /* SPI Chip Select pin */
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uint32_t spi_bit_rate; /* SPI bit rate */
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uint8_t spi_pha; /* SPI mode phase */
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uint8_t spi_pol; /* SPI mode polarity */
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uint8_t spi_controller; /* ID of SPI controller to use */
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} spi_device_t;
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/** @} */
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/*---------------------------------------------------------------------------*/
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/* These are architecture-independent functions to be used by SPI devices. */
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Locks and then opens an SPI controller
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* \param dev An SPI device configuration which defines the controller
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* to be locked and the opening configuration.
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* \return SPI return code
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*/
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spi_status_t spi_acquire(const spi_device_t *dev);
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/**
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* \brief Closes and then unlocks an SPI controller
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* \param dev An SPI device configuration which defines the controller
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* to be closed and unlocked.
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* \return SPI return code
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*
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* Releasing an SPI controller should put it in low-power mode.
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* This should work only if the device has already locked the SPI
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* controller.
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*/
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spi_status_t spi_release(const spi_device_t *dev);
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/**
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* \brief Selects the SPI peripheral
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* \param dev An SPI device configuration which defines the CS pin.
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* \return SPI return code
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*
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* Clears the CS pin. This should work only if the device has
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* already locked the SPI controller.
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*/
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spi_status_t spi_select(const spi_device_t *dev);
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/**
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* \brief Deselects the SPI peripheral
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* \param dev An SPI device configuration which defines the CS pin.
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* \return SPI return code
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*
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* Sets the CS pin. Lock is not required.
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*/
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spi_status_t spi_deselect(const spi_device_t *dev);
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/**
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* \brief Checks if a device has locked an SPI controller
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* \param dev An SPI device configuration which defines the controller.
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* \return true if the device has the lock, false otherwise.
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*/
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bool spi_has_bus(const spi_device_t *dev);
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/**
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* \brief Writes a single byte to an SPI device
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* \param dev An SPI device configuration.
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* \param data A byte of data
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_write_byte(const spi_device_t *dev, uint8_t data);
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/**
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* \brief Reads a single byte from an SPI device
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* \param dev An SPI device configuration.
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* \param data A pointer to a byte of data
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_read_byte(const spi_device_t *dev, uint8_t *data);
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/**
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* \brief Writes a buffer to an SPI device
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* \param dev An SPI device configuration.
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* \param data A pointer to the data
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* \param size Size of the data to write
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_write(const spi_device_t *dev,
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const uint8_t *data, int size);
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/**
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* \brief Reads a buffer from an SPI device
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* \param dev An SPI device configuration.
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* \param data A pointer to the data
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* \param size Size of the data to read
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_read(const spi_device_t *dev, uint8_t *data, int size);
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/**
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* \brief Reads and ignores data from an SPI device
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* \param dev An SPI device configuration.
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* \param size Size of the data to read and ignore
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* \return SPI return code
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*
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* Reads size bytes from the SPI and throws them away.
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_read_skip(const spi_device_t *dev, int size);
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/**
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* \brief Performs a generic SPI transfer
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* \param dev An SPI device configuration.
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* \param data A pointer to the data to be written. Set it to NULL to
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* skip writing.
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* \param wsize Size of data to write.
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* \param buf A pointer to buffer to copy the data read. Set to NULL
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* to skip reading.
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* \param rsize Size of data to read.
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* \param ignore Size of data to read and ignore.
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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* A total of rlen+ignore_len bytes will be read. The first rlen bytes will
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* be copied to buf. The remaining ignore_len bytes won't be copied to the
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* buffer. The maximum of wlen and rlen+ignore_len of bytes will be transfered.
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*/
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spi_status_t spi_transfer(const spi_device_t *dev,
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const uint8_t *data, int wsize,
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uint8_t *buf, int rsize, int ignore);
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/**
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* \brief Reads and Writes one byte from/to an SPI device
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* \param dev An SPI device configuration.
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* \param strobe Byte to write
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* \param status Pointer to byte to read
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_strobe(const spi_device_t *dev, uint8_t strobe,
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uint8_t *status);
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/**
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* \brief Reads a buffer of bytes from a register of an SPI device
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* \param dev An SPI device configuration.
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* \param reg Register
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* \param data A pointer to the data
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* \param size Size of the data to read
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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*/
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spi_status_t spi_read_register(const spi_device_t *dev, uint8_t reg,
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uint8_t *data, int size);
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/*---------------------------------------------------------------------------*/
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/* These are architecture-specific functions to be implemented by each CPU. */
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Checks if a device has locked an SPI controller
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* \param dev An SPI device configuration which defines the controller
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* to be checked if it is locked and the respective device.
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* \return 1 if the device has the lock, 0 otherwise.
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*
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*/
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bool spi_arch_has_lock(const spi_device_t *dev);
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/**
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* \brief Checks if an SPI controller is locked by any device
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* \param dev An SPI device configuration which defines the controller
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* to be checked.
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* \return 1 if the controller is locked, 0 otherwise.
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*
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*/
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bool spi_arch_is_bus_locked(const spi_device_t *dev);
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/**
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* \brief Locks and opens an SPI controller to the configuration specified.
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* \param dev An SPI device configuration.
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* \return SPI return code
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*
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* This should work only if the device has already locked the SPI
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* controller.
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*
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*/
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spi_status_t spi_arch_lock_and_open(const spi_device_t *dev);
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/**
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* \brief Closes and unlocks an SPI controller
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* \param dev An SPI device configuration that specifies the controller.
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* \return SPI return code
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*
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* This should turn off the SPI controller to put it in low power mode
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* and unlock it.
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* It should work only if the device has already locked the SPI
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* controller.
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*
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*/
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spi_status_t spi_arch_close_and_unlock(const spi_device_t *dev);
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/**
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* \brief Performs an SPI transfer
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* \param dev An SPI device configuration that specifies the controller.
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* \param data A pointer to the data to be written. Set it to NULL to
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* skip writing.
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* \param wlen Length of data to write.
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* \param buf A pointer to buffer to copy the data read. Set to NULL
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* to skip reading.
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* \param rlen Length of data to read.
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* \param ignore_len Length of data to read and ignore.
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* \return SPI return code
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*
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* It should work only if the device has already locked the SPI controller.
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* A total of rlen+ignore_len bytes will be read. The first rlen bytes will
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* be copied to buf. The remaining ignore_len bytes won't be copied to the
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* buffer. The maximum of wlen and rlen+ignore_len of bytes will be transfered.
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*/
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spi_status_t spi_arch_transfer(const spi_device_t *dev,
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const uint8_t *data, int wlen,
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uint8_t *buf, int rlen,
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int ignore_len);
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/**
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* \brief Selects an SPI device
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* \param dev An SPI device configuration that specifies the CS pin.
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* \return SPI return code
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*
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* Clears the CS pin. It should work only if the device has already
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* locked the SPI controller.
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*/
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spi_status_t spi_arch_select(const spi_device_t *dev);
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/**
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* \brief Deselects an SPI device
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* \param dev An SPI device configuration that specifies the CS pin.
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* \return SPI return code
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*
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* Set the CS pin. Locking the SPI controller is not needed.
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*/
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spi_status_t spi_arch_deselect(const spi_device_t *dev);
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#endif /* SPI_H_ */
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/*---------------------------------------------------------------------------*/
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/**
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* @}
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* @}
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*/
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