368 lines
10 KiB
C
368 lines
10 KiB
C
/**
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* \addtogroup cc2538dk
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* @{
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*
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* \file
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* Configuration for the cc2538dk platform
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*/
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#ifndef CONTIKI_CONF_H_
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#define CONTIKI_CONF_H_
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#include <stdint.h>
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#include <string.h>
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/*---------------------------------------------------------------------------*/
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/* Include Project Specific conf */
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#ifdef PROJECT_CONF_PATH
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#include PROJECT_CONF_PATH
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#endif /* PROJECT_CONF_PATH */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Compiler configuration and platform-specific type definitions
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*
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* Those values are not meant to be modified by the user
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* @{
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*/
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#define CLOCK_CONF_SECOND 128
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/* Compiler configurations */
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#define CCIF
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#define CLIF
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/* Platform typedefs */
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typedef uint32_t clock_time_t;
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typedef uint32_t uip_stats_t;
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/*
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* rtimer.h typedefs rtimer_clock_t as unsigned short. We need to define
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* RTIMER_CLOCK_DIFF to override this
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*/
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typedef uint32_t rtimer_clock_t;
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#define RTIMER_CLOCK_DIFF(a,b) ((int32_t)((a)-(b)))
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/** @} */
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/*---------------------------------------------------------------------------*/
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/* 352us from calling transmit() until the SFD byte has been sent */
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#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(352))
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/* 192us as in datasheet but ACKs are not always received, so adjusted to 250us */
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#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(250))
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#define RADIO_DELAY_BEFORE_DETECT 0
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#ifndef TSCH_CONF_BASE_DRIFT_PPM
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/* The drift compared to "true" 10ms slots.
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* Enable adaptive sync to enable compensation for this.
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* Slot length 10000 usec
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* 328 ticks
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* Tick duration 30.517578125 usec
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* Real slot duration 10009.765625 usec
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* Target - real duration = -9.765625 usec
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* TSCH_CONF_BASE_DRIFT_PPM -977
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*/
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#define TSCH_CONF_BASE_DRIFT_PPM -977
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#endif
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#if MAC_CONF_WITH_TSCH
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#define TSCH_CONF_HW_FRAME_FILTERING 0
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#endif /* MAC_CONF_WITH_TSCH */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Serial Boot Loader Backdoor configuration
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*
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* @{
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*/
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#ifndef FLASH_CCA_CONF_BOOTLDR_BACKDOOR
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#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR 1 /**<Enable the boot loader backdoor */
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#endif
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#ifndef FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN
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#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN 3 /**< Pin PA_3 (Select button) activates the boot loader */
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#endif
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#ifndef FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH
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#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH 0 /**< A logic low level activates the boot loader */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name CC2538 System Control configuration
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*
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* @{
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*/
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#ifndef SYS_CTRL_CONF_OSC32K_USE_XTAL
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#define SYS_CTRL_CONF_OSC32K_USE_XTAL 1 /**< Use the on-board 32.768-kHz crystal */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Watchdog Timer configuration
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*
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* @{
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*/
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#ifndef WATCHDOG_CONF_ENABLE
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#define WATCHDOG_CONF_ENABLE 1 /**< Enable the watchdog timer */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name USB 'core' configuration
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*
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* Those values are not meant to be modified by the user, except where stated
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* otherwise
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* @{
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*/
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#define CTRL_EP_SIZE 8
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#define USB_EP1_SIZE 32
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#define USB_EP2_SIZE 64
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#define USB_EP3_SIZE 64
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#define USB_ARCH_WRITE_NOTIFY 0
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#ifndef USB_ARCH_CONF_DMA
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#define USB_ARCH_CONF_DMA 1 /**< Change to Enable/Disable USB DMA */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name uDMA Configuration and channel allocations
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*
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* @{
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*/
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#define USB_ARCH_CONF_RX_DMA_CHAN 0 /**< USB -> RAM DMA channel */
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#define USB_ARCH_CONF_TX_DMA_CHAN 1 /**< RAM -> USB DMA channel */
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#define CC2538_RF_CONF_TX_DMA_CHAN 2 /**< RF -> RAM DMA channel */
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#define CC2538_RF_CONF_RX_DMA_CHAN 3 /**< RAM -> RF DMA channel */
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#define UDMA_CONF_MAX_CHANNEL CC2538_RF_CONF_RX_DMA_CHAN
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Character I/O Configuration
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*
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* @{
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*/
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#ifndef UART_CONF_ENABLE
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#define UART_CONF_ENABLE 1 /**< Enable/Disable UART I/O */
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#endif
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#ifndef UART0_CONF_BAUD_RATE
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#define UART0_CONF_BAUD_RATE 115200 /**< Default UART0 baud rate */
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#endif
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#ifndef UART1_CONF_BAUD_RATE
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#define UART1_CONF_BAUD_RATE 115200 /**< Default UART1 baud rate */
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#endif
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#ifndef SLIP_ARCH_CONF_USB
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#define SLIP_ARCH_CONF_USB 0 /**< SLIP over UART by default */
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#endif
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#ifndef DBG_CONF_USB
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#define DBG_CONF_USB 0 /**< All debugging over UART by default */
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#endif
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#ifndef SERIAL_LINE_CONF_UART
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#define SERIAL_LINE_CONF_UART 0 /**< UART to use with serial line */
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#endif
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#if !SLIP_ARCH_CONF_USB
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#ifndef SLIP_ARCH_CONF_UART
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#define SLIP_ARCH_CONF_UART 0 /**< UART to use with SLIP */
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#endif
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#endif
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#if !DBG_CONF_USB
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#ifndef DBG_CONF_UART
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#define DBG_CONF_UART 0 /**< UART to use for debugging */
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#endif
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#endif
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#ifndef UART1_CONF_UART
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#define UART1_CONF_UART 0 /**< UART to use for examples relying on
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the uart1_* API */
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#endif
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/* Turn off example-provided putchars */
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#define SLIP_BRIDGE_CONF_NO_PUTCHAR 1
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#define SLIP_RADIO_CONF_NO_PUTCHAR 1
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#ifndef SLIP_ARCH_CONF_ENABLED
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/*
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* Determine whether we need SLIP
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* This will keep working while UIP_FALLBACK_INTERFACE and CMD_CONF_OUTPUT
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* keep using SLIP
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*/
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#if defined (UIP_FALLBACK_INTERFACE) || defined (CMD_CONF_OUTPUT)
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#define SLIP_ARCH_CONF_ENABLED 1
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#endif
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#endif
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/**
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* \brief Define this as 1 to build a headless node.
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*
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* The UART will not be initialised its clock will be gated, offering some
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* energy savings. The USB will not be initialised either
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*/
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#ifndef CC2538_CONF_QUIET
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#define CC2538_CONF_QUIET 0
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#endif
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/* CC2538_CONF_QUIET is hard and overrides all other related defines */
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#if CC2538_CONF_QUIET
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#undef USB_SERIAL_CONF_ENABLE
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#define USB_SERIAL_CONF_ENABLE 0
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#undef UART_CONF_ENABLE
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#define UART_CONF_ENABLE 0
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#endif /* CC2538_CONF_QUIET */
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/**
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* \brief Enable the USB core only if we need it
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*/
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#ifndef USB_SERIAL_CONF_ENABLE
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#define USB_SERIAL_CONF_ENABLE \
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((SLIP_ARCH_CONF_USB && SLIP_ARCH_CONF_ENABLED) || \
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(MAC_CONF_WITH_TSCH && (SLIP_ARCH_CONF_ENABLED || BUILD_WITH_SHELL)) || \
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DBG_CONF_USB)
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#endif
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/*
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* If debugging and SLIP use the same peripheral, this will be 1. Don't modify
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* this
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*/
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#if SLIP_ARCH_CONF_ENABLED
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#define DBG_CONF_SLIP_MUX (SLIP_ARCH_CONF_USB == DBG_CONF_USB && \
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(SLIP_ARCH_CONF_USB || \
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SLIP_ARCH_CONF_UART == DBG_CONF_UART))
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#endif
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/*
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* Automatic detection of whether a specific UART is in use
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*/
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#define UART_IN_USE_BY_SERIAL_LINE(u) (SERIAL_LINE_CONF_UART == (u))
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#define UART_IN_USE_BY_SLIP(u) (SLIP_ARCH_CONF_ENABLED && \
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!SLIP_ARCH_CONF_USB && \
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SLIP_ARCH_CONF_UART == (u))
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#define UART_IN_USE_BY_DBG(u) (!DBG_CONF_USB && DBG_CONF_UART == (u))
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#define UART_IN_USE_BY_UART1(u) (UART1_CONF_UART == (u))
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#define UART_IN_USE(u) ( \
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UART_CONF_ENABLE && \
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(UART_IN_USE_BY_SERIAL_LINE(u) || \
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UART_IN_USE_BY_SLIP(u) || \
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UART_IN_USE_BY_DBG(u) || \
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UART_IN_USE_BY_UART1(u)) \
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)
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/** @} */
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/*---------------------------------------------------------------------------*/
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/* board.h assumes that basic configuration is done */
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#include "board.h"
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/*---------------------------------------------------------------------------*/
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#define NETSTACK_CONF_RADIO cc2538_rf_driver
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name LPM configuration
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* @{
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*/
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#ifndef LPM_CONF_ENABLE
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#define LPM_CONF_ENABLE 1 /**< Set to 0 to disable LPM entirely */
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#endif
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/**
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* \brief Maximum PM
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*
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* The SoC will never drop to a Power Mode deeper than the one specified here.
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* 0 for PM0, 1 for PM1 and 2 for PM2
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*/
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#ifndef LPM_CONF_MAX_PM
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#define LPM_CONF_MAX_PM 1
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#endif
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#ifndef LPM_CONF_STATS
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#define LPM_CONF_STATS 0 /**< Set to 1 to enable LPM-related stats */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name IEEE address configuration
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*
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* Used to generate our link-layer & IPv6 address
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* @{
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*/
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/**
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* \brief Location of the IEEE address
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* 0 => Read from InfoPage,
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* 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS
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*/
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#ifndef IEEE_ADDR_CONF_HARDCODED
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#define IEEE_ADDR_CONF_HARDCODED 0
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#endif
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/**
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* \brief The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED
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* is defined as 1
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*/
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#ifndef IEEE_ADDR_CONF_ADDRESS
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#define IEEE_ADDR_CONF_ADDRESS { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
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#endif
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/**
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* \brief Location of the IEEE address in the InfoPage when
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* IEEE_ADDR_CONF_HARDCODED is defined as 0
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* 0 => Use the primary address location
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* 1 => Use the secondary address location
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*/
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#ifndef IEEE_ADDR_CONF_USE_SECONDARY_LOCATION
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#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 0
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name RF configuration
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*
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* @{
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*/
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/* RF Config */
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#ifdef RF_CHANNEL
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#define CC2538_RF_CONF_CHANNEL RF_CHANNEL
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#endif
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#ifndef CC2538_RF_CONF_CHANNEL
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#define CC2538_RF_CONF_CHANNEL 25
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#endif /* CC2538_RF_CONF_CHANNEL */
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#ifndef CC2538_RF_CONF_AUTOACK
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#define CC2538_RF_CONF_AUTOACK 1 /**< RF H/W generates ACKs */
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#endif /* CC2538_CONF_AUTOACK */
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#ifndef CC2538_RF_CONF_TX_USE_DMA
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#define CC2538_RF_CONF_TX_USE_DMA 1 /**< RF TX over DMA */
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#endif
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#ifndef CC2538_RF_CONF_RX_USE_DMA
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#define CC2538_RF_CONF_RX_USE_DMA 1 /**< RF RX over DMA */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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/**
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* \name Security
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*
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* @{
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*/
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#ifndef CRYPTO_CONF_INIT
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#define CRYPTO_CONF_INIT 1 /**< Whether to init cryptoprocessor */
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#endif
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#ifndef AES_128_CONF
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#define AES_128_CONF cc2538_aes_128_driver /**< AES-128 driver */
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#endif
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#ifndef CCM_STAR_CONF
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#define CCM_STAR_CONF cc2538_ccm_star_driver /**< AES-CCM* driver */
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#endif
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/** @} */
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/*---------------------------------------------------------------------------*/
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#endif /* CONTIKI_CONF_H_ */
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/** @} */
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