2021-06-26 17:15:17 +00:00
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#include <avr/io.h>
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#include "macro.h"
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.data
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2021-06-26 20:34:22 +00:00
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2021-06-26 17:15:17 +00:00
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status:
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.byte 0x0
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2021-06-26 20:34:22 +00:00
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offset:
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.byte 78
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2021-06-26 21:42:23 +00:00
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line:
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.word 0
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2021-06-26 17:15:17 +00:00
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.text
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.global main_s
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main_s:
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ldi r16, 0x30
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sts DDRB, r16
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ldi r16, (1 << IVCE) ; set vector at address 0x0
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ldi r17, 0
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out IO(MCUCR), r16
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out IO(MCUCR), r17
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2021-06-26 21:42:23 +00:00
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ldi r16, 0xa ; external interrupt 0 and 1, falling edge
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2021-06-26 17:15:17 +00:00
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sts EICRA, r16
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2021-06-26 21:42:23 +00:00
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ldi r16, 0x3 ; external interrupt 0 and 1, mask enable
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2021-06-26 17:15:17 +00:00
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sts EIMSK, r16
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sei
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again:
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sbi IO(PORTB), 5
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ldi r16, 0x1
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sts status, r16
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wait1:
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ldi r16, 0xff
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ldi r17, 0xff
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ldi r18, 0xff
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1:
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dec r16
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brne 1b
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dec r17
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brne 1b
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dec r18
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brne 1b
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cbi IO(PORTB), 5
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ldi r16, 0x0
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sts status, r16
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wait2:
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ldi r16, 0xff
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ldi r17, 0xff
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ldi r18, 0xff
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1:
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dec r16
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brne 1b
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dec r17
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brne 1b
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dec r18
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brne 1b
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jmp again
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.global int_horizontal_sync
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int_horizontal_sync:
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push r31
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in r31, IO(SREG) ; status register
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push r31
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2021-06-26 21:42:23 +00:00
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lds r31, line
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cpi r31, 255
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brsh int_horizontal_sync_end
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inc r31
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sts line, r31
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lds r31, status
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cpi r31, 0
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brne int_horizontal_sync_end
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2021-06-26 20:34:22 +00:00
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lds r31, offset
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dec r31
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cpi r31, 1
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brne 1f
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ldi r31, 140
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1:
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sts offset, r31
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loop:
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dec r31
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brne loop
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sbi IO(PORTB), 4
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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cbi IO(PORTB), 4
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int_horizontal_sync_end:
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pop r31
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out IO(SREG), r31
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pop r31
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reti
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2021-06-26 21:42:23 +00:00
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.global int_vertical_sync
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int_vertical_sync:
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push r31
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ldi r31, 0
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sts line, r31
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ldi r31, 140
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sts offset, r31
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pop r31
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reti
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