Move clock setup into VGA module.

src/main.c

@@ -7,9 +7,6 @@
  *
  */
 
-#include "hardware/clocks.h"
-
-#include "hardware/pll.h"
 #include "pico/stdlib.h"
 
 #include <stdint.h>
@@ -21,33 +18,8 @@
 #include "framebuffer.h"
 #include "vga.h"
 
-void setup_clocks(void)
-{
-	// disable resuscitation clock
-	clocks_hw->resus.ctrl = 0;
-
-	// before changing PLL, switch sys and ref cleanly away from their aux sources
-	hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
-	while (clocks_hw->clk[clk_sys].selected != 0x1)
-		tight_loop_contents();
-	hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
-	while (clocks_hw->clk[clk_ref].selected != 0x1)
-		tight_loop_contents();
-
-	// set PLL at 126 MHz, and wait for it to stabilize
-	pll_init(pll_sys, 1, 1512 * MHZ, 6, 2);
-
-	// re-configure sys_clk to use PLL
-	clock_configure(clk_sys, CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
-	                CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 126 * MHZ, 126 * MHZ);
-
-	// re-configure CLK PERI = clk_sys
-	clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS, 126 * MHZ, 126 * MHZ);
-}
-
 int main()
 {
-	setup_clocks();
 	stdio_init_all();
 
 	draw_demo();

src/vga.c

@@ -5,6 +5,8 @@
 #include "hardware/dma.h"
 #include "hardware/pio.h"
 #include "hardware/structs/pio.h"
+#include "hardware/clocks.h"
+#include "hardware/pll.h"
 
 #include "framebuffer.h"
 #include "vga.pio.h"
@@ -26,6 +28,30 @@ static int dma_channel;
 
 unsigned long int frame_counter = 0;
 
+static void setup_clocks(void)
+{
+	// disable resuscitation clock
+	clocks_hw->resus.ctrl = 0;
+
+	// before changing PLL, switch sys and ref cleanly away from their aux sources
+	hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
+	while (clocks_hw->clk[clk_sys].selected != 0x1)
+		tight_loop_contents();
+	hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
+	while (clocks_hw->clk[clk_ref].selected != 0x1)
+		tight_loop_contents();
+
+	// set PLL at 126 MHz, and wait for it to stabilize
+	pll_init(pll_sys, 1, 1512 * MHZ, 6, 2);
+
+	// re-configure sys_clk to use PLL
+	clock_configure(clk_sys, CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
+	                CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 126 * MHZ, 126 * MHZ);
+
+	// re-configure CLK PERI = clk_sys
+	clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS, 126 * MHZ, 126 * MHZ);
+}
+
 static void vga_pixel_program_init(PIO pio, uint sm, uint offset)
 {
 	// config function automatically declared by SDK scripts
@@ -115,6 +141,10 @@ void new_frame_handler(void)
 
 void vga_machines_init(void)
 {
+	// setup a proper system clock
+	// (126MHz = 4 x 31.5 MHz pixel clock)
+	setup_clocks();
+
 	// Running programs on PIO
 	vga_hsync.pio = vga_vsync.pio = vga_pixel.pio = pio0;