Move clock setup into VGA module.
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parent
36cc3e1c0a
commit
5f11fa209f
28
src/main.c
28
src/main.c
@ -7,9 +7,6 @@
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*
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*/
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#include "hardware/clocks.h"
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#include "hardware/pll.h"
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#include "pico/stdlib.h"
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#include <stdint.h>
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@ -21,33 +18,8 @@
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#include "framebuffer.h"
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#include "vga.h"
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void setup_clocks(void)
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{
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// disable resuscitation clock
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clocks_hw->resus.ctrl = 0;
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// before changing PLL, switch sys and ref cleanly away from their aux sources
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hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_sys].selected != 0x1)
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tight_loop_contents();
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hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_ref].selected != 0x1)
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tight_loop_contents();
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// set PLL at 126 MHz, and wait for it to stabilize
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pll_init(pll_sys, 1, 1512 * MHZ, 6, 2);
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// re-configure sys_clk to use PLL
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clock_configure(clk_sys, CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
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CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 126 * MHZ, 126 * MHZ);
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// re-configure CLK PERI = clk_sys
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clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS, 126 * MHZ, 126 * MHZ);
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}
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int main()
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{
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setup_clocks();
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stdio_init_all();
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draw_demo();
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30
src/vga.c
30
src/vga.c
@ -5,6 +5,8 @@
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#include "hardware/dma.h"
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#include "hardware/pio.h"
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#include "hardware/structs/pio.h"
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#include "hardware/clocks.h"
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#include "hardware/pll.h"
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#include "framebuffer.h"
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#include "vga.pio.h"
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@ -26,6 +28,30 @@ static int dma_channel;
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unsigned long int frame_counter = 0;
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static void setup_clocks(void)
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{
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// disable resuscitation clock
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clocks_hw->resus.ctrl = 0;
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// before changing PLL, switch sys and ref cleanly away from their aux sources
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hw_clear_bits(&clocks_hw->clk[clk_sys].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_sys].selected != 0x1)
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tight_loop_contents();
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hw_clear_bits(&clocks_hw->clk[clk_ref].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
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while (clocks_hw->clk[clk_ref].selected != 0x1)
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tight_loop_contents();
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// set PLL at 126 MHz, and wait for it to stabilize
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pll_init(pll_sys, 1, 1512 * MHZ, 6, 2);
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// re-configure sys_clk to use PLL
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clock_configure(clk_sys, CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX,
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CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 126 * MHZ, 126 * MHZ);
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// re-configure CLK PERI = clk_sys
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clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS, 126 * MHZ, 126 * MHZ);
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}
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static void vga_pixel_program_init(PIO pio, uint sm, uint offset)
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{
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// config function automatically declared by SDK scripts
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@ -115,6 +141,10 @@ void new_frame_handler(void)
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void vga_machines_init(void)
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{
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// setup a proper system clock
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// (126MHz = 4 x 31.5 MHz pixel clock)
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setup_clocks();
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// Running programs on PIO
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vga_hsync.pio = vga_vsync.pio = vga_pixel.pio = pio0;
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