giomba/ceda2vga
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Put hsync and vsync in phase.

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giomba 2022-10-12 20:54:29 +02:00
parent a5339f6fcf
commit d805003349
1 changed files with 7 additions and 4 deletions
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11
src/vga.pio
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@ -13,6 +13,8 @@ entrypoint_vga_hsync:
mov isr, osr mov isr, osr
pull pull
loope:
set y, 15
loop: loop:
mov x, isr mov x, isr
set pins, 0 set pins, 0
@ -23,7 +25,10 @@ hsync_pulse:
set pins, 1 set pins, 1
hsync_idle: hsync_idle:
jmp x-- hsync_idle jmp x-- hsync_idle
jmp loop jmp y-- loop
irq set 0
jmp loope
.program vga_vsync .program vga_vsync
@ -33,13 +38,11 @@ entrypoint_vga_vsync:
pull pull
loop: loop:
wait irq 0
mov x, isr mov x, isr
set pins, 0 set pins, 0
vsync_pulse: vsync_pulse:
jmp x-- vsync_pulse jmp x-- vsync_pulse
mov x, osr
set pins, 1 set pins, 1
vsync_idle:
jmp x-- vsync_idle
jmp loop jmp loop