2017-12-03 00:35:15 +00:00
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/*
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* Copyright (c) 2017, George Oikonomou - http://www.spd.gr
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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#ifndef CC13XX_CC26XX_DEF_H_
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#define CC13XX_CC26XX_DEF_H_
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/*---------------------------------------------------------------------------*/
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#include "cm3/cm3-def.h"
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/*---------------------------------------------------------------------------*/
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/* TSCH related defines */
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2018-09-09 19:32:33 +00:00
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/* 2 bytes header, 4 bytes CRC */
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#define CC13XX_RADIO_PHY_OVERHEAD 6
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/* 3 bytes preamble, 3 bytes sync */
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#define CC13XX_RADIO_PHY_HEADER_LEN 6
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/* The default data rate is 50 kbps */
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#define CC13XX_RADIO_BIT_RATE 50000
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2018-10-03 11:35:09 +00:00
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/* 1 len byte, 2 bytes CRC */
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2018-09-09 19:32:33 +00:00
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#define CC26XX_RADIO_PHY_OVERHEAD 3
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/* 4 bytes preamble, 1 byte sync */
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#define CC26XX_RADIO_PHY_HEADER_LEN 5
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/* The fixed data rate is 250 kbps */
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#define CC26XX_RADIO_BIT_RATE 250000
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#if CPU_FAMILY_CC13XX
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#define RADIO_PHY_HEADER_LEN CC13XX_RADIO_PHY_HEADER_LEN
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#define RADIO_PHY_OVERHEAD CC13XX_RADIO_PHY_OVERHEAD
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#define RADIO_BIT_RATE CC13XX_RADIO_BIT_RATE
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/* The TSCH default slot length of 10ms is too short, use custom one instead */
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#ifndef TSCH_CONF_DEFAULT_TIMESLOT_TIMING
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#define TSCH_CONF_DEFAULT_TIMESLOT_TIMING tsch_timing_cc13xx_50kbps
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#endif /* TSCH_CONF_DEFAULT_TIMESLOT_TIMING */
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/* Symbol for the custom TSCH timeslot timing template */
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#define TSCH_CONF_ARCH_HDR_PATH "rf-core/cc13xx-50kbps-tsch.h"
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#else
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#define RADIO_PHY_HEADER_LEN CC26XX_RADIO_PHY_HEADER_LEN
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#define RADIO_PHY_OVERHEAD CC26XX_RADIO_PHY_OVERHEAD
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#define RADIO_BIT_RATE CC26XX_RADIO_BIT_RATE
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#endif
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#define RADIO_BYTE_AIR_TIME (1000000 / (RADIO_BIT_RATE / 8))
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2017-12-03 00:35:15 +00:00
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/* Delay between GO signal and SFD */
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2018-09-09 19:32:33 +00:00
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#define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(RADIO_PHY_HEADER_LEN * RADIO_BYTE_AIR_TIME))
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2017-12-03 00:35:15 +00:00
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/* Delay between GO signal and start listening.
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* This value is so small because the radio is constantly on within each timeslot. */
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#define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(15))
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/* Delay between the SFD finishes arriving and it is detected in software. */
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#define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(352))
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/* Timer conversion; radio is running at 4 MHz */
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#define RADIO_TIMER_SECOND 4000000u
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#if (RTIMER_SECOND % 256) || (RADIO_TIMER_SECOND % 256)
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#error RADIO_TO_RTIMER macro must be fixed!
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#endif
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#define RADIO_TO_RTIMER(X) ((uint32_t)(((uint64_t)(X) * (RTIMER_SECOND / 256)) / (RADIO_TIMER_SECOND / 256)))
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#define USEC_TO_RADIO(X) ((X) * 4)
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/* Do not turn off TSCH within a timeslot: not enough time */
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#define TSCH_CONF_RADIO_ON_DURING_TIMESLOT 1
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/* Disable TSCH frame filtering */
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#define TSCH_CONF_HW_FRAME_FILTERING 0
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/* Use hardware timestamps */
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#ifndef TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS
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#define TSCH_CONF_RESYNC_WITH_SFD_TIMESTAMPS 1
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#define TSCH_CONF_TIMESYNC_REMOVE_JITTER 0
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#endif
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#ifndef TSCH_CONF_BASE_DRIFT_PPM
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/* The drift compared to "true" 10ms slots.
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* Enable adaptive sync to enable compensation for this.
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* Slot length 10000 usec
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* 328 ticks
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* Tick duration 30.517578125 usec
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* Real slot duration 10009.765625 usec
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* Target - real duration = -9.765625 usec
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* TSCH_CONF_BASE_DRIFT_PPM -977
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*/
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#define TSCH_CONF_BASE_DRIFT_PPM -977
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#endif
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/* 10 times per second */
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#ifndef TSCH_CONF_CHANNEL_SCAN_DURATION
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#define TSCH_CONF_CHANNEL_SCAN_DURATION (CLOCK_SECOND / 10)
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#endif
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2018-09-15 13:16:27 +00:00
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/* Increase this from the default 100 to improve TSCH association speed on this platform */
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#ifndef TSCH_CONF_ASSOCIATION_POLL_FREQUENCY
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#define TSCH_CONF_ASSOCIATION_POLL_FREQUENCY 1000
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#endif
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2017-12-03 00:35:15 +00:00
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/* Slightly reduce the TSCH guard time (from 2200 usec to 1800 usec) to make sure
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* the CC26xx radio has sufficient time to start up. */
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#ifndef TSCH_CONF_RX_WAIT
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#define TSCH_CONF_RX_WAIT 1800
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#endif
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/*---------------------------------------------------------------------------*/
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#define RTIMER_ARCH_SECOND 65536
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/*---------------------------------------------------------------------------*/
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2017-12-03 17:50:37 +00:00
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/* Path to CMSIS header */
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#define CMSIS_CONF_HEADER_PATH "cc13x0-cc26x0-cm3.h"
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2017-12-03 17:54:22 +00:00
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/* Path to headers with implementation of mutexes and memory barriers */
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#define MUTEX_CONF_ARCH_HEADER_PATH "mutex-cortex.h"
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2017-12-03 17:52:26 +00:00
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#define MEMORY_BARRIER_CONF_ARCH_HEADER_PATH "memory-barrier-cortex.h"
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2017-12-16 22:18:07 +00:00
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#define GPIO_HAL_CONF_ARCH_HDR_PATH "dev/gpio-hal-arch.h"
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/*---------------------------------------------------------------------------*/
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#define GPIO_HAL_CONF_ARCH_SW_TOGGLE 0
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2017-12-03 17:50:37 +00:00
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/*---------------------------------------------------------------------------*/
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2018-03-02 19:36:22 +00:00
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#define SPI_CONF_CONTROLLER_COUNT 2
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/*---------------------------------------------------------------------------*/
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2017-12-03 00:35:15 +00:00
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#endif /* CC13XX_CC26XX_DEF_H_ */
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/*---------------------------------------------------------------------------*/
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