This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate interrupt pins.
The application uses default galileo pinmux initialization and sets
the GPIO 5 (IO2) as output pin and GPIO 6 (IO3) as interrupt. It toggles
the output pin stat at every half second in order to emulate an interrupt.
This triggers an interrupt and the application callback is called.
This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate input pins.
The application uses default galileo pinmux initialization and sets the
GPIO 5 (IO2) as output pin and GPIO 6 (IO3) as input. It toggles the
output pin state at every half second and checks the value on input pin.
This patch adds the galileo-pinmux.c and galileo-pinmux.h files,
which support access to pinmux configuration through a function
interface.
This is not 100% supported yet due to some pinmux paths
need Quark X1000 GPIO (legacy and non-legacy) configurations.
After we finish to implement Quark X1000 GPIO driver we'll add
support for this.
This patch adds pwm-pca9685.c and pwm-pca9685.h files,
which support access to I2C-based PCA9685 PWM controller
configuration register through a function interface.
The PCA9685 is an I2C-bus controlled 16-channel LED controller
optimized for Red/Green/Blue/Amber (RGBA) color backlighting
applications. Each LED output has its own 12-bit resolution
(4096 steps) fixed frequency individual PWM controller that
operates at a programmable frequency from a typical of 24 Hz to
1526 Hz with a duty cycle that is adjustable from 0 % to 100 %
to allow the LED to be set to a specific brightness value.
More about PCA9685 can be found in its datasheet[1].
This driver is needed in order to configure Galileo pinmux.
[1] - http://www.nxp.com/documents/data_sheet/PCA9685.pdf
This patch adds gpio-pcal9535a.c and gpio-pcal9535a.h files,
which support access to I2C-based PCAL9535A GPIO controller
configuration register through a function interface.
The PCAL9535A is a low-voltage 16-bit GPIO expander with interrupt
and reset for I2C-bus/SMBus applications. It contains the PCA9535
register set of four pairs of 8-bit Configuration, Input, Output,
and Polarity Inversion registers, and additionally, the PCAL9535A has
Agile I/O, which are additional features specifically designed to
enhance the I/O. More about PCAL9535A can be found in its datasheet[1].
This driver is needed in order to configure Galileo pinmux.
[1] - http://www.nxp.com/documents/data_sheet/PCAL9535A.pdf
This patch adds an example application that shows how to use I2C driver
APIs to communicate with LSM9DS0 sensor. At every 5 seconds, the
application reads the "Who Am I" register from gyroscope sensor and
prints if the register value matches the expected value.
This patch adds the i2c.c, i2c.h and i2c-registers.h files,
which support access to I2C controller configuration register
through a function interface.
This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate output pins. The application sets the
GPIO 4 pin as output pin and toggles its state at every half second.
This patch adds the gpio.c and gpio.h files, which support
access to GPIO Controller (non-legacy) configuration register
through a function interface.
It doesn't add interrupt support due to pinmux reasons. On
Galileo Gen 2 we need to configure a pin as input/interrupt
using pinmux and this can only be achieved through I2C. There's
one pin exported by default as GPIO output and we used this one
to test this driver.
In the future, we plan to add an I2C driver and a pinmux configuration
driver in order to solve this kind of problems.
This patch adds support for PCI BAR1 and also changes
the pci_init(), instead of having one function for each `bar`
we now set the `bar` to pci_config_addr_t parameter before calling
the pci_init() function..
This patch adds the 'meta' field to the generic driver structure to
point to optional driver-defined metadata. It also modifies the
associated initialization routine to populate it and updates the 16X50
UART driver to use the new initialization routine signature. This
patch also adds a function to perform PCI configuration register
writes, definitions for the PCI Command configuration register address
and some of the bits in that register, and a function to set
additional bits in that register. Finally, it adds macros to help
with performing MMIO to and from PCI devices.
This patch replaces the gcc option '-Og' by '-O0' which is used when
building debugging binaries. The motivation for this change comes
from the fact that we have found at least one optimization done by
'-Og' that interfered with one of our debugging sessions.
This patch adds -ffunction-sections and -fdata-sections to the
'release' CFLAGS so each function and data is place into its
own section in the output file. It also adds --gc-section to
the 'release' LDFLAGS so the linker removes the sections which
are not referenced.
This patch also adds -ffunction-sections and -fdata-sections
options to CFLAGS from build_newlib.sh. This increases newlib
static libraries size, however, the Contiki image shrinks even
more since --gc-section removes "dead code" from newlib.
As a practical effect, all unused function and data (as well as
sections such as .eh_frame) are striped out from the final elf
binary. This shrinks our release binary drastically.
Finally, to prevent --gc-section from removing .multiboot section,
this patch adds KEEP(*(.multiboot)) to quarkX1000.ld.
PCI Interrupt Routing is mapped using Interrupt Queue Agents
IRQAGENT[0:3] and aggregating the INT[A:D] interrupts for each
PCI-mapped device in the SoC.
PCI based interrupts PIRQ[A:H] are then available for consumption
by either the 8259 PICs or the IO-APIC, depending on the configuration
of the 8 PIRQx Routing Control Registers PIRQ[A:H].
More information about can be find in Intel Quark X1000 datasheet[1]
section 21.11.
[1] - http://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html
When generating binaries, gcc will always add information of what it
calls "the exception handler framework" into its own section: .eh_frame.
This section is based on the DWARF format's call frame information (CFI) [1]
and holds information that can be useful for debuggers but also for language
constructs that relies on always having stack unwinding information (i.e. exceptions).
Such constructs, however, are pretty much useless for the C language and are
mainly just used on C++. Furthermore, this section is one of the loadable sections
of a binary, meaning it will take extra space on flash.
When .eh_frame is not present, debuggers can still get the exact same information
they need for unwinding a stack frame and for restoring registers thanks to yet
another section: .debug_frame. This section is generated by '-g' gcc option and
friends. It is actually defined by DWARF and, as opposed to .eh_frame, is not a
loadable section. In other words, it is 'strippable' while .eh_frame is not.
Since all we need is the debug information we can get from .debug_frame, we can
disable the generation of these large and unused information tables by using gcc's
'-fno-asynchronous-unwind-tables'. The .eh_frame section stays around but the code
size issue is heavily tackled. This is the same approach taken on other projects
that target small code size generation [2] [3].
Pratically speaking, on a DEBUG build of the all-timers appplication, before this
patch we had:
text data bss dec hex filename
21319 1188 12952 35459 8a83 all-timers.galileo
And now, after this patch:
text data bss dec hex filename
16347 1188 12952 30487 7717 all-timers.galileo
This means a ~5Kb reduction on the loadable text segment (.text + .rodata + .eh_frame).
The flag is applied regardless of build type, DEBUG or RELEASE, since it benefits both.
Note that when release builds apply --gc-sections, they will remove .eh_frame section entirely.
[1] http://comments.gmane.org/gmane.comp.standards.dwarf/222
[2] 0d74ad383b
[3] http://git.musl-libc.org/cgit/musl/commit/?id=b439c051c7eee4eb4b93fc382f993aa6305ce530
[4] https://refspecs.linuxfoundation.org/LSB_3.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
This patch slightly revises CFLAGS and LDFLAGS to specify the
optimization and debugging options and linker script in a way that is
compatible with using Clang as the C compiler and to invoke the linker
(i.e. CC = clang and LD = clang).
The SET_INTERRUPT_HANDLER macro in interrupt.h used an inline assembly
feature to cause GCC to generate a unique number for a trampoline
label. Clang compiled the code using that feature without generating
any compile-time errors, but it always generated the number 0,
resulting in all interrupt trampolines having the same label names.
This patch replaces the usage of that feature with local labels, which
are supported by both GCC and Clang. See
https://sourceware.org/binutils/docs/as/Symbol-Names.html for an
explanation of local labels.
The SET_INTERRUPT_HANDLER macro defines and registers an interrupt
handler. It outputs a trampoline for the interrupt handler using a
block of inline assembly, and the address of that trampoline is what
is actually placed in the IDT. That trampoline invokes the main body
of the interrupt handler.
This patch adds a missing clobber list to the inline assembly block.
It simply lists the caller-saved registers defined by the cdecl
calling convention: EAX, ECX, and EDX. This is necessary, because the
inline assembly block invokes idt_set_intr_gate_desc using a call
instruction at the time the function containing the
SET_INTERRUPT_HANDLER instance is executed. The
idt_set_intr_gate_desc function is free to clobber EAX, ECX, and EDX
according to cdecl. A Clang-generated implementation of
idt_set_intr_gate_desc did in fact clobber those registers, resulting
in incorrect operation of the code following an instance of
SET_INTERRUPT_HANDLER. The change in this patch informs the compiler
that those registers may be clobbered so that it can adjust the code
that it outputs around the inline assembly block accordingly.
This patch modifies the include order to include headers from newlib
ahead of those from the core of Contiki. The only header file names
that are common between Contiki and newlib are assert.h and config.h,
but the config.h files in Contiki are only located in ports for other
CPUs so they are irrelevant to this patch. The motivation for this
patch is to cause files that include assert.h to include the one from
newlib that halts when an assertion fails. The assert implementation
in the core of Contiki does not halt when an assertion fails.
This patch also adds newlib syscall stubs that are required by the
newlib assert implementation and the _exit syscall function that halts
the system.
Finally, this patch updates some other newlib syscall stubs to
properly indicate their status as unsupported syscalls.
This patch revises README.md to mention the UART support introduced by
earlier patches in the section about verifying that Contiki is
running. It also revises the serial console setup instructions to
focus on the more thoroughly tested option.
Child sections can be created depending on the CFLAGS used when building Contiki.
For instance, if built with -ffunction-sections or -fdata-sections would create
one section per function/variable and -Os sometimes split part of .text into one
child section.
This can also be an issue if we start linking with external libraries that are
built in such a way. Since we can't foresee how the port is going to be used,
we should make sure it is ready for the cases above.
This patch fixes this by correctly grouping child sections into their parent
sections.
Patch developed while investigating a bug with José Souza (jose.souza@intel.com).
This patch removes 'newlib-syscalls.c' from CONTIKI_SOURCEFILES variable
and appends it to PROJECT_SOURCEFILES. This way the buildsystem will
automatically consider the newlib-syscalls object code during linking
time.
This patch appends some gcc options to CFLAGS when building the default
image in order to improve the debugging experience on GDB.
We use the '-ggdb' option which produces debugging information used by
GDB (including GDB extensions) with level 3 which includes preprocessor
macros information. We also use '-Og' which enables optimizations that
do not interfere with debugging. According to gcc manpage, it should be
the optimization level of choice for the standard edit-compile-debug
cycle, offering a reasonable level of optimization while maintaining
fast compilation and a good debugging experience.
Also, this patch removes the '-g' option from the default CFLAGS because
there is no point in using it when BUILD_RELEASE=1.
As expected, the overall ELF image increases (due to -ggdb3 option) while
the .text section is reduced (due to -Og). For the sake of comparison,
below follows the output of 'size'.
Before patch:
$ size -A hello-world.galileo
hello-world.galileo :
section size addr
.text 13766 1048576
.rodata 241 1064960
.eh_frame 5160 1065204
.eh_frame_hdr 1212 1070364
.data 1188 1073152
.bss 12808 1077248
.debug_info 14351 0
.debug_abbrev 6281 0
.debug_aranges 768 0
.debug_line 6443 0
.debug_str 4805 0
.comment 17 0
.note 40 0
.debug_ranges 24 0
Total 67104
After patch:
$ size -A hello-world.galileo
hello-world.galileo :
section size addr
.text 11718 1048576
.rodata 249 1060864
.eh_frame 5496 1061116
.eh_frame_hdr 1204 1066612
.data 1156 1069056
.bss 12808 1073152
.debug_info 16727 0
.debug_abbrev 7254 0
.debug_loc 2083 0
.debug_aranges 768 0
.debug_macro 17273 0
.debug_line 13433 0
.debug_str 42192 0
.comment 17 0
.note 40 0
Total 132418
This patch adds support for building release images. The main difference
between release images and default images is that the former is optimized
for size while the latter is "optimized" for debugging. To build a release
image, the BUILD_RELEASE variable should be set to 1. For instance, the
following command build a release image from the hello-world application:
$ cd examples/hello-world && make TARGET=galileo BUILD_RELEASE=1
To optimize for size we use the '-Os' option from gcc. This option also
enables the strict aliasing optimization. This generates lots of warning
messages since we use the '-Wall' option and lots of code in core/net/
break the strict-aliasing rules. Some test have shown that the strict
aliasing optimization it not taking effect in the final binary. For that
reasons, this patch manually disables the optimization. Also, the release
image is stripped.
For the sake of comparison, below follows the output from 'wc' and 'size'
for both debugging (default) and release images.
Default image:
$ wc -c hello-world.galileo
71112 hello-world.galileo
$ size hello-world.galileo
text data bss dec hex filename
20379 1188 12808 34375 8647 hello-world.galileo
Release image:
$ wc -c hello-world.galileo
26320 hello-world.galileo
$ size hello-world.galileo
text data bss dec hex filename
18146 1156 12808 32110 7d6e hello-world.galileo
This patch removes _kill_r and _getpid_r stubs since they are not
required by newlib at this moment. These stubs should not be in
the commit that introduced the initial newlib-syscalls.c file.
This patch introduces the initial support for stdio library in Galileo
platform. For now, only standard output and error are supported. Both
streams use the UART1 device.
Newlib doesn't call open() for stdin, stdout, and stderr which means
that the _write_r call is the first activity the stub will see on
those streams. For that reason, we initialize the UART1 device in
Galileo's platform main() function instead of in open() system call.
This patch implements the _sbrk_r() system call for Galileo platform. This
system call is required by newlib's malloc() implementation. Next patch
will introduce the initial support for stdio library which requires a
working malloc() function for proper operation.
We are not sure about the heap size we should use. Preliminary tests
have shown that stdio library requests 1032 bytes heap. So, as an initial
guess, a 2Kb heap size should be enough for now.
This patch adds a driver for an MMIO-accessible 16X50 UART. It
assumes that the boot firmware assigned an MMIO range to the UART. It
operates in polled mode with FIFOs enabled.
This patch adds a generic device driver structure with a field for
referencing an MMIO range. It also provides a structure
initialization procedure that initializes the MMIO range field with
the value read from the PCI BAR0 register for a device.
This patch adds the pci.c and pci.h files, which support access to PCI
configuration registers through a function interface. It defines the
PCI configuration register access I/O port addresses and the
pci_config_addr union and structure to assist in specifying addresses
of PCI configuration registers. It also defines the PCI configuration
register identifier for PCI BAR0.
This patch also adds wrappers for 32-bit 'in' and 'out' port I/O
instructions. They were placed in helpers.S, since they may be useful
to other modules besides just the PCI support module.
This patch enhances build_newlib.sh to create Makefile.libc so that
the main Galileo makefile can attempt to include Makefile.libc and
instruct the developer to run build_newlib.sh first if the definition
within Makefile.libc is not detected.
This patch moves the compiler and linking options related to QuarkX1000
SoC to Makefile.x86_quarkX1000 since it is more suitable. For instance,
'-m32' should be used in any platform based on QuarkX1000, not only
Galileo. The same rationale applies for the others options (e.g. -march,
mtune).
This patch does several cleanups in Makefile.x86_common file. The
changes are described above.
1) The CFLAGNO variable was removed since it is used only to assign
the CFLAGS variable. Also, CFLAGNO is not used outside Makefile.x86_
common.
2) The "-I/usr/local/include" option was removed since we provide manually
the include path from newlib in the bsp/ directory.
3) We only support building x86-based platforms on Linux so there is no
point in setting LDFLAGS conditionally.
4) The '-export-dynamic' option was removed from LDFLAGS since we are not
creating a dynamically linked executable.
5) Makefile.x86_quarkX1000 is the only one that includes Makefile.x86_
common. Since it doesn't use the custom rules from Makefile.x86_
common we remove them.
The CFLAGS setting used for the newlib build process includes
"-mtune=i586" as does the ASFLAGS setting used for the Contiki build
process. However, the CFLAGS setting used for the Contiki build
process did not include that flag. This patch adds it for
consistency.
Ubuntu enables GCC's stack protector by default (see
https://wiki.ubuntu.com/Security/Features). This causes link errors
like the following:
...undefined reference to `__stack_chk_fail'
To avoid these errors, this patch adds the "-fno-stack-protector" flag
to both the CFLAGS used by the Contiki build process and the CFLAGS
used by the newlib build process.
This patch adds "--build-id=none" to default LDFLAGS so
.note.gnu.build-id section is not generated. This section
contains unique identification for the built files what is
not important to us (at least at this moment).
This change simplifies all linker scripts for SoCs based on x86
(at this moment we only have Quark X1000) since we don't have to
care about it anymore.
According to [1], we should disable non-maskable and maskable interrupts
while initializing RTC. Otherwise, the RTC may be left in an undefined
state (non-functional) if an interrupt occurs. Currently, maskable
interrupts are already disabled, but NMI is not.
This patch adds helpers APIs to enable/disable non-maskable interrupts
(NMI) and changes rtc_init() to disable NMI while initializing the RTC.
NMI enable/disable code is legacy-PC specific therefore it was put in
driver/legacy_pc/ directory.
Regarding the RTC initialization changes, just calling nmi_disable() and
nmi_enable is not enough since NMI and RTC share the same IO port. So We
should also set the NMI_ENABLE bit while selecting the RTC_INDEX.
Additionally, the nmi_disable() call is not strictly required since we
set the NMI_ENABLE bit while selecting the RTC_INDEX. However, to make
clear hat we are disabling NMI and to improve readability (by matching
NMI disable/enable), the nmi_disable() call was purposely used.
[1] http://wiki.osdev.org/RTC
This is a refactoring patch, no functionality is changed. It moves
loader.S and galileo.ld from platform/galileo/ to cpu/x86/ directory
since they seem to be more SoC-specific than platform-specific.
It also renames galileo.ld to quarkX1000.ld since it can be used by
any platform based on Quark X1000 SoC, not only Galileo.
Furthermore, this patch also renames loader.S to bootstrap_quarkX1000.S
since it is pretty much a bootstrap code to any platform based on Quark
X1000 SoC.
This commit turns cpu_init() into a SoC-agnostic function by
removing any SoC specific calls and isolating them into their
own SoC implementation.
We start this by isolating all IRQs initialization code from
the legacy-pc target, pic_init() and spurious IRQ7 registration,
into a new interface: irq_init() from irq.h. Future SoCs will have
to provide their own implementation of this interface.
This model is to be followed by future initialization code that
we may need to add and which is not common to all x86 SoCs.
The x86/init/common/ folder holds all cpu initialization
code - idt and gdt setup, interrupts and cpu initialization.
On this folder will also sit any SoC specific implementation of
the functions called from cpu_init().
Now the cpu/x86/ provides a Makefile.x86_common and a
Makefile.x86_pc. The former includes the common Makefile
and adds legacy pc specific implementations (currently,
drivers only) into the building context, while the latter
has everything that defines the bootstrap of a x86 CPU.
This commit also fixes platform/galileo/ so it includes the
correct makefile - Makefile.x86_quarkX1000. Galileo uses
a Quark X1000 SoC which is not an IBM Generic PC-like CPU,
but it does provide most of a PCs peripherals through
its "Legacy Bridge". Thus, it makes sense that QuarkX1000's
Makefile includes code from the legacy_pc x86 cpu.
All drivers implemented so far are for chips which are only available
on legacy x86 PCs. This commit moves them into a more appropriate folder,
also making the cpu/x86/drivers/ folder ready for other x86 based SoCs.
