George Oikonomou
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7160e1dbd2
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Change the way of configuring SPI controller count
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2018-04-04 11:30:32 +01:00 |
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George Oikonomou
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d88c3d0c01
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Implement the GPIO HAL for CC13xx/CC26xx
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2018-02-24 12:50:01 +00:00 |
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George Oikonomou
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82bc3363d1
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Use Cortex-M mutexes (CC13xx/CC26xx)
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2017-12-09 17:09:58 +00:00 |
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George Oikonomou
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bdddf41ca9
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Use Cortex-M memory barriers (CC13xx/CC26xx)
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2017-12-09 17:09:57 +00:00 |
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George Oikonomou
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690bad7d5e
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Allow different CPUs to specify how they hook into CMSIS
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2017-12-09 17:09:57 +00:00 |
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George Oikonomou
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945c66b7f8
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Provide header file with defines for the CC13xx/CC26xx
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2017-12-06 16:00:46 +00:00 |