Richard Weickelt c99c3b4b5f Rewriting clock module based upon DPL		2018-08-31 11:04:38 +02:00
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cc26x0_cc13x0	Cleaned up CCFG configuration, and aligned CC13x0_cc26x0 and	2018-08-31 11:04:37 +02:00
cc26x2_cc13x2	Cleaned up CCFG configuration, and aligned CC13x0_cc26x0 and	2018-08-31 11:04:37 +02:00
source	Rewriting clock module based upon DPL	2018-08-31 11:04:38 +02:00
ccfg-conf.h	Cleaned up CCFG configuration, and aligned CC13x0_cc26x0 and	2018-08-31 11:04:37 +02:00
Makefile.cc26x0_cc13x0	Compiling example of dummy simplelink platform	2018-08-31 11:04:37 +02:00
Makefile.cc26x2_cc13x2	Added working simplelink platform without netstack	2018-08-31 11:04:38 +02:00
Makefile.simplelink	Added UART serial interface printing	2018-08-31 11:04:38 +02:00
simplelink-conf.h	Fixed remaking Makefiles, removed implicit %.o for %.elf, aligned	2018-08-31 11:04:37 +02:00