Rewrite some non-real-time initialization code in C.
This commit is contained in:
parent
d645c1ada2
commit
a3fc600996
51
main.S
51
main.S
@ -1,12 +1,14 @@
|
|||||||
|
; main.S
|
||||||
|
;
|
||||||
|
; This file is part of OSDY VideoCharGen
|
||||||
|
; a do-it-yourself on-screen-display image generator
|
||||||
|
; for superimposition of analog PAL signals
|
||||||
|
;
|
||||||
#include <avr/io.h>
|
#include <avr/io.h>
|
||||||
#include "macro.h"
|
#include "macro.h"
|
||||||
#include "const.h"
|
#include "const.h"
|
||||||
|
|
||||||
|
|
||||||
.data
|
.data
|
||||||
image:
|
|
||||||
.byte 0xff
|
|
||||||
|
|
||||||
show_image:
|
show_image:
|
||||||
.byte 0x00
|
.byte 0x00
|
||||||
|
|
||||||
@ -18,48 +20,19 @@ current_jump_table:
|
|||||||
|
|
||||||
.text
|
.text
|
||||||
|
|
||||||
.global main
|
.global main_asm
|
||||||
main:
|
main_asm:
|
||||||
ldi r16, 0x30 ; port B, pin 4 and 5 as output, others as input
|
|
||||||
sts DDRB, r16
|
|
||||||
|
|
||||||
; set interrupt vectors at address 0x0, not bootloader
|
|
||||||
; timing is important, see atmel datasheet
|
|
||||||
ldi r16, (1 << IVCE)
|
|
||||||
ldi r17, 0
|
|
||||||
out IO(MCUCR), r16
|
|
||||||
out IO(MCUCR), r17
|
|
||||||
|
|
||||||
ldi r16, 0xa ; external interrupt 0 and 1, falling edge
|
|
||||||
sts EICRA, r16
|
|
||||||
|
|
||||||
ldi r16, 0x3 ; external interrupt 0 and 1, mask enable
|
|
||||||
sts EIMSK, r16
|
|
||||||
|
|
||||||
ldi r16, 0x02 ; don't connect output pins to timer, CTC[1:0] mode
|
|
||||||
sts TCCR0A, r16
|
|
||||||
ldi r16, 0x01 ; CTC[2] mode, no prescaler
|
|
||||||
sts TCCR0B, r16
|
|
||||||
|
|
||||||
; init variables
|
; init variables
|
||||||
ldi r16, 0
|
ldi r16, 0
|
||||||
sts frame, r16
|
|
||||||
sts frame + 1, r16
|
|
||||||
sts line, r16
|
|
||||||
ldi r16, 0xfe
|
|
||||||
sts line + 1, r16
|
|
||||||
ldi r16, 0xff
|
|
||||||
sts image, r16
|
|
||||||
ldi r16, 0
|
|
||||||
sts show_image, r16
|
sts show_image, r16
|
||||||
|
|
||||||
; r0 always holds 0
|
; r0 always holds 0
|
||||||
clr r0
|
clr r0
|
||||||
|
|
||||||
call setup_c
|
; global interrupt enable
|
||||||
|
sei
|
||||||
sei ; global interrupt enable
|
|
||||||
|
|
||||||
|
; endless loop
|
||||||
1:
|
1:
|
||||||
rjmp 1b
|
rjmp 1b
|
||||||
|
|
||||||
@ -182,7 +155,7 @@ check_if_released:
|
|||||||
in r31, IO(PINB)
|
in r31, IO(PINB)
|
||||||
andi r31, 0x04
|
andi r31, 0x04
|
||||||
; if transition mode == 1, then always show image
|
; if transition mode == 1, then always show image
|
||||||
; TODO an huge shitty spaghetti code
|
; Nice to have: maybe this can be written better.
|
||||||
breq 1f
|
breq 1f
|
||||||
ldi r31, 0
|
ldi r31, 0
|
||||||
sts show_image, r31
|
sts show_image, r31
|
||||||
|
51
main.c
51
main.c
@ -1,21 +1,54 @@
|
|||||||
#include <avr/io.h>
|
/**
|
||||||
#include <avr/interrupt.h>
|
* @file main.c
|
||||||
|
* @author giomba@glgprograms.it
|
||||||
|
* @brief OSDY main.
|
||||||
|
*
|
||||||
|
* @copyright Copyright RetrOfficina GLG Programs (c) 2022
|
||||||
|
*
|
||||||
|
* Video image generator superimposition for analog PAL signals,
|
||||||
|
* with Atmega328, for your retro OSD titles.
|
||||||
|
*
|
||||||
|
*/
|
||||||
#include "const.h"
|
#include "const.h"
|
||||||
|
#include <avr/interrupt.h>
|
||||||
|
#include <avr/io.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
volatile uint16_t frame;
|
volatile uint16_t frame = 0;
|
||||||
volatile uint16_t line;
|
volatile uint16_t line = 0xfe;
|
||||||
|
volatile uint8_t image = 0xff;
|
||||||
|
|
||||||
ISR(INT0_vect, ISR_NAKED) {
|
ISR(INT0_vect, ISR_NAKED) {
|
||||||
asm("jmp int_vertical_sync");
|
// vertical sync interrupt
|
||||||
|
asm("jmp int_vertical_sync");
|
||||||
}
|
}
|
||||||
ISR(INT1_vect, ISR_NAKED) {
|
ISR(INT1_vect, ISR_NAKED) {
|
||||||
asm("jmp int_horizontal_sync");
|
// horizontal sync interrupt
|
||||||
|
asm("jmp int_horizontal_sync");
|
||||||
}
|
}
|
||||||
ISR(TIMER0_COMPA_vect, ISR_NAKED) {
|
ISR(TIMER0_COMPA_vect, ISR_NAKED) {
|
||||||
asm("jmp int_timer_0");
|
// back porch timer interrupt
|
||||||
|
asm("jmp int_timer_0");
|
||||||
}
|
}
|
||||||
|
|
||||||
void setup_c() {
|
// external assembly main loop
|
||||||
}
|
void main_asm(void);
|
||||||
|
|
||||||
|
int main() {
|
||||||
|
// port B, pin 4 and 5 as output, others as input
|
||||||
|
DDRB |= 0x30;
|
||||||
|
|
||||||
|
// set interrupt vectors at address 0x0, not bootloader
|
||||||
|
// timing is important, see atmel datasheet
|
||||||
|
_SFR_IO8(MCUCR) = (1 << IVCE);
|
||||||
|
_SFR_IO8(MCUCR) = 0;
|
||||||
|
|
||||||
|
EICRA = 0x0a; // external interrupt 0 and 1, falling edge
|
||||||
|
EIMSK = 0x03; // external interrupt 0 and 1, mask enable
|
||||||
|
|
||||||
|
TCCR0A = 0x02; // don't connect output pins to timer, CTC[1:0] mode
|
||||||
|
|
||||||
|
TCCR0B = 0x01; // CTC[2] mode, no prescaler
|
||||||
|
|
||||||
|
main_asm();
|
||||||
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user