This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate interrupt pins.
The application uses default galileo pinmux initialization and sets
the GPIO 5 (IO2) as output pin and GPIO 6 (IO3) as interrupt. It toggles
the output pin stat at every half second in order to emulate an interrupt.
This triggers an interrupt and the application callback is called.
This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate input pins.
The application uses default galileo pinmux initialization and sets the
GPIO 5 (IO2) as output pin and GPIO 6 (IO3) as input. It toggles the
output pin state at every half second and checks the value on input pin.
This patch adds an example application that shows how to use I2C driver
APIs to communicate with LSM9DS0 sensor. At every 5 seconds, the
application reads the "Who Am I" register from gyroscope sensor and
prints if the register value matches the expected value.
This patch introduces an example application to demonstrate how to use
GPIO driver APIs to manipulate output pins. The application sets the
GPIO 4 pin as output pin and toggles its state at every half second.
This commit adds a very simple example which is useful to verify
that all timers APIs are working. There are 3 protothreads running,
the first process tests etimer, timer and stimer APIs, the second
process tests the ctimer APIs, and the third one tests the rtimer
APIs.
The peripheral core clocks of the PWM timers are gated in PM1+, so these
power modes must be disabled if a PWM timer is running. Use
lpm_register_peripheral() to handle this automatically and dynamically.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
So far 80 column display was an attribute of a cc65 platform. Now each cc65 application can ask for 80 column display by defining WITH_80COL. Of course this is ignored by platforms incapable of 80 column display.
I see three types of application:
* Applications not benefitting from 80 column at all and in fact looking better with 40 column display. These are now using 40 column display. Examples: ethconfig, ipconfig
* Applications taking advantage of 80 column display if it is available without drawbacks. These stay as they were. Examples: Telnet server, web server, wget
* Applications needing 80 column display so urgently that it is likely desirable even if the display becomes harder to read. These come now in both flavors allowing the user to choose. Examples: IRC, web browser
Note: This change doesn't actually introduce any 80 column display with drawbacks. This if left to a subsequent change.
The current version of the CC26xx web demo publishes over MQTT the default parent's IPv6 address and the last observed RSSI of this link. This is collected by active probing (periodic ping).
This commit brings the probing functionality to the example's main code module. The MQTT client keeps publishing as previously, but we now also export the same information through CoAP resources. Configuration is still possible through the example's web server.
This demonstraties how to combine CC13xx tick suppression, RPL leaf mode and turning off ContikiMAC duty cycling to build an extremely low-consuming firmware.
In order to have the wget command make some sense the write command should be present too.
- On the Apple][ reduction of the MTU seems to gain just enough RAM to have the (rather heavy-weight) full-blown C library file I/O working.
- On the C128 there's way too little RAM so there's no wget command but only the file commands.
- On the CBMs a dummy lseek() was necessary to have the read command link.
Several keys can be kept at the same time in the key store, and several
keys can be loaded at once. Give access to these features.
The ccm-test example is also improved to better demonstrate the use of
the key store.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Using the AES interrupt allows the user process not to waste time
polling for the completion of the operation. This time can be used by
the user process to do something else, or to let the system enter PM0.
Since the system is now free to perform various operations during a
crypto operation, a protection of the crypto resource is added, and PM1+
is prohibited in order not to stall crypto operations.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
