a199809298
Added the Core SDK submodule
2018-08-31 11:05:30 +02:00
66005c9232
Extracted TX Power settings to its own file
2018-08-31 11:04:52 +02:00
3031be39a8
Added BOARD_STRING
2018-08-31 11:04:51 +02:00
640570cd38
Removed space between keyword and parentheses
2018-08-31 11:04:51 +02:00
54e8adfdec
Fixed elif
2018-08-31 11:04:51 +02:00
06cc883b3f
Fixed DeviceFamily_constructPath()
2018-08-31 11:04:51 +02:00
1d0f6227dc
Fixed doxygen
2018-08-31 11:04:50 +02:00
824296cbc0
Removed external bias as default from RF settings, and doxygen alignment
2018-08-31 11:04:50 +02:00
dfc6ee611a
Doxygen alignment, and fixed missing TRNG objects
2018-08-31 11:04:49 +02:00
c333e9f783
Slight naming refactoring, and removed bloat .vramTable from linker
2018-08-31 11:04:49 +02:00
de0197d71f
Normalized TX power settings
2018-08-31 11:04:48 +02:00
5f8727a6ba
Added missing include for sensortag board-conf
2018-08-31 11:04:48 +02:00
f4a8cba371
Rehauled doxygen commenting and fixed TI drivers configuration
2018-08-31 11:04:48 +02:00
8cd6017305
Cleanup in config
2018-08-31 11:04:47 +02:00
e0bd086b3b
Ported BLE beacond, fixed IEEE_RX_ACK.
2018-08-31 11:04:47 +02:00
f307794b39
Reworked RF driver into scheduler
2018-08-31 11:04:46 +02:00
315bfc00d3
Added SUPPORT_BLE_BEACON flag
2018-08-31 11:04:46 +02:00
924e4f5ea5
Removed unused files.
2018-08-31 11:04:45 +02:00
bb00eaa041
Normalized GPIO HAL, fixed LEDS & Buttons HAL, and aligned sensortag and
...
SRF06 boards
2018-08-31 11:04:45 +02:00
d4828c7baf
Fixed GPIO HAL issue.
2018-08-31 11:04:44 +02:00
f3a030b0a4
Fixed button-sensor for launchpad
2018-08-31 11:04:44 +02:00
12a6eefa85
Lots of fixes for prop-mode and ieee-mode
2018-08-31 11:04:44 +02:00
f6b016c5d4
Working prop-mode
2018-08-31 11:04:44 +02:00
f9fcbd6a77
Fixed IEEE settings, aligned naming of RF commands
2018-08-31 11:04:44 +02:00
7b812e73c9
Fixed naming and alignment of RF settings, Watchdog driver, Board files
2018-08-31 11:04:44 +02:00
2d69241381
Fixed CC2650STK board files, and leds-arch for sensortag
2018-08-31 11:04:43 +02:00
40227d0817
Fixed RF Settings, Board files, Sensortag sensors
2018-08-31 11:04:43 +02:00
745c2b24b6
Fixed RF settings and Board files
2018-08-31 11:04:42 +02:00
02b812a631
[Feature]: Simplelink Platform for Simplelink SDK
...
Working Simplelink platform with the following Simplelink SDK's:
* CC13x0 SDK
* CC13x2 SDK
* CC26x2 SDK
Is also compatible with Code Composer Studio (XDCTools)
2018-08-31 11:04:41 +02:00
a76462b908
Initial commit of Simplelink rework
2018-08-31 11:04:40 +02:00
7e96029211
Initial try of structuring platform dependent code
2018-08-31 11:04:39 +02:00
6007b1be07
Implemented the Contiki leds driver
...
NB! This is by no means a future-proof implementation. However, it
should be a good starting point. Configuration of the LEDS_ARCH_*
defines in the leds-arch.c file is what determines what LEDs are
available of a given device/target. This information should be
sufficient from the Board file/device name, and can from there
hardcod what board+device combination a given LED should support.
2018-08-31 11:04:39 +02:00
5c058b9c52
Refactored after PR review
2018-08-31 11:04:39 +02:00
7f813e8e0e
Compiling and untested IEEE mode radio driver
2018-08-31 11:04:39 +02:00
2d198a7858
Enable proper standby and idle. Just one line, thats it.
2018-08-31 11:04:39 +02:00
56721d13cf
Working prop rf driver
2018-08-31 11:04:39 +02:00
0102628245
Prop RF driver now complete
2018-08-31 11:04:39 +02:00
2b0091246d
UART0 arch driver impl
...
* Async read
* Renamed driver to uart0-arch
* Renamed arch/cpu source folder to dev/
2018-08-31 11:04:38 +02:00
b30ef7d56d
Added async read on UART
2018-08-31 11:04:38 +02:00
c99c3b4b5f
Rewriting clock module based upon DPL
2018-08-31 11:04:38 +02:00
c8023df8a5
Added UART serial interface printing
2018-08-31 11:04:38 +02:00
765e35ba7f
Added working simplelink platform without netstack
2018-08-31 11:04:38 +02:00
f83579098b
Resolve remarks
2018-08-31 11:04:37 +02:00
8cee2abae6
List only directories
2018-08-31 11:04:37 +02:00
a40e5bc314
Build the board file and add all libraries from the SDK
2018-08-31 11:04:37 +02:00
12c9056cec
Cleaned up CCFG configuration, and aligned CC13x0_cc26x0 and
...
CC13x2_CC26x2 CPU conf
2018-08-31 11:04:37 +02:00
c7aaefb4da
Add board file deduction logic and board init stages
2018-08-31 11:04:37 +02:00
ddd451a19b
Compiling example of dummy simplelink platform
2018-08-31 11:04:37 +02:00
81b782636a
Initial port
2018-08-31 11:04:37 +02:00
Edvard Pettersen
Richard Weickelt